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Nexperia 74LVC1G06GV,125 product image
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Nexperia 74LVC1G06GV,125RoHS

Manufacturer
MPN
74LVC1G06GV,125
LCSC Part #
C12510
Packaging
SOT-753
Customer #
Key Attributes
Inverter with open-drain output
Datasheetpdf iconNexperia 74LVC1G06GV,125
In-Stock: 3,840
3,840 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.0729$ 0.36
50+$ 0.0573$ 2.87
150+$ 0.0495$ 7.43
500+$ 0.0437$ 21.85
3,000+$ 0.039$ 117.00
6,000+$ 0.0367$ 220.20
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingSOT-753
Input TypeSchmitt trigger
Logic Family74LVC
Voltage - Supply1.65V~5.5V
Output Logic Level - Low-
Propagation Delay4ns@5V,50pF
FeaturesPower shutdown protection;Noise suppression function
Input Logic Level - Low580mV~1.65V
Input Logic Level - High1.07V~3.85V
Operating Temperature-40℃~+125℃
Number of Circuits1
Output Logic Level - High-
Quiescent Current(Iq)200uA
Current - Output High(IOH)-
Number of Channels1
Current - Output Low(IOL)32mA

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC1G06 is a single inverter with open-drain output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Overvoltage tolerant inputs to 5.5 V
  • IOFF circuitry provides partial Power-down mode operation
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +125 ℃