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MICROCHIP DSPIC33FJ256GP506-I/PT product image
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MICROCHIP DSPIC33FJ256GP506-I/PTRoHS

Manufacturer
MPN
DSPIC33FJ256GP506-I/PT
LCSC Part #
C124921
Packaging
TQFP-64(10x10)
Customer #
Key Attributes
256KB 53 TQFP-64(10x10) Microcontrollers RoHS
Datasheetpdf iconMICROCHIP DSPIC33FJ256GP506-I/PT
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QtyUnit Price(Reference Only)Total Amount
1+$ 8.6664$ 8.67
10+$ 8.2563$ 82.56
Standard Packaging160/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerMICROCHIP
PackagingTQFP-64(10x10)
ROM Size-
Operating Temperature-40℃~+85℃
Voltage - Supply3V~3.6V
FLASH Size256KB
Number of I/O53

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging160
Sales UnitPiece

Features

AI Translation
  • Operating Range:
    • DC – 40 MIPS (40 MIPS at 3.0 - 3.6V, -40℃ to +85℃)
    • Industrial temperature range (-40℃ to +85℃)
  • High-Performance DSC CPU:
    • Modified Harvard architecture
    • C compiler-optimized instruction set
    • 16-bit wide data bus
    • 24-bit wide instructions
    • Linear program memory space addressable up to 4M instruction words
    • Linear data memory space addressable up to 64 KB
    • 83 base instructions: mostly single-word/single-cycle
    • 16 × 16-bit general-purpose registers
    • Two 40-bit accumulators with rounding and saturation options
    • Flexible and powerful addressing modes: indirect, modulo, and bit-reversed addressing
    • Software stack
    • 16×16-bit fractional/integer multiply
    • 32/16-bit and 16/16-bit divide
    • Single-cycle multiply-accumulate: accumulator write-back for DSP operations, dual data fetch
    • Barrel shift of up to 40-bit data by up to 16 bits left or right
  • Direct Memory Access (DMA):
    • 8-channel hardware DMA
    • 2 KB dual-ported DMA buffer (DMA RAM) for DMA transfer data storage: enables data transfer between RAM and peripherals during CPU code execution (no additional cycles)
    • DMA support for most peripherals
  • Interrupt Controller:
    • 5-cycle interrupt latency
    • 118 interrupt vectors
    • Up to 63 interrupt sources
    • Up to 5 external interrupts
    • 7 programmable priority levels
    • 5 processor exceptions
  • Digital I/O:
    • Up to 85 programmable digital I/O pins
    • Wake-up/change-of-state interrupt on up to 24 pins
    • Output pins drive 3.0V to 3.6V
    • All digital input pins 5V tolerant
    • 4 mA maximum source/sink current on all I/O pins
  • On-Chip Flash and SRAM:
    • Flash program memory up to 256 KB
    • Data SRAM up to 30 KB (including 2 KB DMA RAM)
  • System Management:
    • Flexible clock selection: external oscillator, crystal, resonator, and internal RC oscillator; fully integrated PLL; ultra-low-jitter PLL
    • Power-on delay timer
    • Oscillator start-up timer/stabilizer
    • Watchdog timer with dedicated RC oscillator
    • Fail-safe clock monitor
    • Multiple reset sources
  • Power Management:
    • On-chip 2.5V voltage regulator
    • Real-time clock source switching
    • Fast wake-up Idle, Sleep, and Doze modes
  • Timer/Capture/Compare/PWM:
    • Up to 9 × 16-bit timer/counters: pairable as up to 4 × 32-bit timers
    • 1 timer operable as real-time clock with external 32.768 kHz oscillator
    • Programmable prescaler
    • Input capture (up to 8 channels): rising-edge, falling-edge, or both-edge capture; 16-bit capture input; 4-deep FIFO per capture channel
    • Output compare (up to 8 channels): single or dual 16-bit compare modes; 16-bit glitch-free PWM mode
  • Communication Modules:
    • 3-wire SPI (up to 2 modules): framed I/O interface for simple codec support; 8-bit and 16-bit data; all serial clock formats and sampling modes; full multimaster/slave support; 7-bit and 10-bit addressing; bus collision detection and arbitration; integrated signal conditioning; slave address masking
    • UART (up to 2 modules): interrupt on address bit detection; interrupt on UART error; wake from Sleep on Start bit detection; 4-character deep transmit and receive FIFO; LIN bus support; hardware IrDA encode/decode; high-speed baud rate mode; hardware flow control using CTS and RTS
    • Data Converter Interface (DCI) module: codec interface; supports I²S and AC'97 protocols; up to 16-bit data words; up to 16 words per frame; 4-deep transmit and receive buffers; up to 8 transmit and 32 receive buffers; 16 receive filters and 3 mask registers; loopback, listen-only, and listen-all-messages modes for diagnostics and bus monitoring; device wake-up on CAN message reception; automatic remote transmit request handling; FIFO mode with DMA; DeviceNet addressing support
  • Analog-to-Digital Converters (ADC):
    • Up to 2 ADC modules per device
    • 10-bit 1.1 Msps or 12-bit 500 Ksps conversion: 2, 4, or 8 simultaneous samples; up to 32 input channels with auto-scan; manual or synchronized conversion start with one of 4 trigger sources; conversion in Sleep mode; integral nonlinearity error max ±1 LSb; differential nonlinearity error max ±1 LSb
  • CMOS Flash Technology:
    • Low-power high-speed flash technology
    • Fully static design
    • 3.3V (±10%) operating voltage
    • Industrial temperature
    • Low power consumption

Applications

AI Translation
  • Various 16-bit MCU embedded applications
  • Voice and audio processing applications