TI TPS65217CRSLR

TPS65217 is a single-chip power management IC specifically designed to support AM335x series application processors in portable and 5V non-portable applications. It provides a linear battery charger for single-cell Li-Ion and Li-Polymer batteries, dual-input power path, three buck converters, four LDOs, and a high-efficiency boost converter to drive 2 strings of LEDs with up to 10 LEDs per string. The system can be powered by any combination of a USB port, 5V AC adapter, or Li-Ion battery. The device is rated for an operating temperature range of -40°C to +105°C, making it suitable for industrial applications. Three high-efficiency 2.25MHz buck converters supply core voltage, memory, and/or I/O voltage for a processor-based system.

To achieve maximum efficiency across the widest possible load current range, they enter a low-power mode at light loads. For low-noise applications, the device can be forced into fixed-frequency PWM mode via the I²C interface. The buck converters allow the use of small inductors and capacitors for a compact solution size.

LDO1 and LDO2 are designed to support system standby mode. In SLEEP state, output current is limited to 1mA to reduce quiescent current, while in normal mode each can support up to 100mA. LDO3 and LDO4 each support up to 200mA and can be configured as load switches instead of regulators. All four LDOs feature a wide input voltage range, allowing them to be powered from one of the DC-DC converters or directly from the system voltage rail.

By default, only LDO1 remains always ON, but any power rail can be configured to remain active in sleep state. In particular, the DCDC converters can continue operating in a low-power pulse frequency modulation (PFM) mode to support processor suspend mode.

TPS65217 provides flexible power-on and power-off sequencing, along with several housekeeping functions such as power-good output, pushbutton monitor, hardware reset, and temperature sensor for battery protection.

TPS65217A supports AM335x processors in the ZCE package, which does not support DVFS. In this package, VDD_MPU and VDD_CORE are shorted together and require only a single power rail. DCDC1 output voltage is set to 1.8V to power DDR2 memory. TPS65217B targets AM335x processors in the ZCZ package, which supports DVFS and requires dedicated DCDC converters for the VDD_MPU and VDD_CORE rails. DCDC1 output voltage is set to 1.8V to power DDR2 memory. TPS65217C is intended for AM335x processors in the ZCZ package, but DCDC1 output voltage is set to 1.5V to power DDR3 memory. LDO3 is set to 1.8V and supports up to 400mA.

TPS65217D is identical to TPS65217C, with the only difference being that the default DCDC1 output voltage is 1.35V to support DDR3L memory.

TPS65217A, TPS65217B, TPS65217C, and TPS65217D are available in a 48-pin leadless package (6mm x 6mm QFN) with 0.4mm ball pitch.

• 2A output current on power path
• Linear charger; max charge current 700mA
• USB and AC input withstand voltage up to 20V
• USB input current limit: 100mA, 500mA, 1300mA, or 1800mA
• Thermal regulation, safety timer
• Temperature sense input
• Input voltage range: 1.8V - 5.8V
• Switch impedance 300mΩ (typical)
• Current limit 200mA
• Passive discharge to GND when disabled
• LDO output voltage range: 1.5V - 3.3V
• Input voltage range: 2.7V - 5.8V
• Current limit 200mA (TPS65217A, B)
• Current limit 400mA (TPS65217C, D)
• When configured as LDO, passive discharge to GND when disabled
• DCDC1 at 1.2A: 0.9V - 1.8V
• DCDC2 at 1.2A: 0.9V - 3.3V
• DCDC3 at 1.2A: 0.9V - 1.5V
• Internally generated PWM for brightness control
• 38V open-LED protection
• Supports two strings of up to 10 LEDs at 25mA per LED
• Internal low-side current sink protection
• Undervoltage lockout and battery fault comparator
• Always-on push-button monitor
• Hardware reset pin
• Password-protected I²C registers
• LDO1 at 100mA: 1.0V - 3.3V (default 1.8V)
• LDO2 at 100mA: 0.9V - 3.3V (default 3.3V)
• Input voltage range: 1.8V - 5.8V
• LDO2 configurable to track DCDC3
• Quiescent current typical 15μA
• 2 independent load switches configurable as LDO
• Interface (address 0x24)
• Password-protected IP registers
• 6mm×6mm, 48-pin QFN package

• AM335x ARM Cortex-A8 microprocessor
• Portable navigation systems
• Tablet computers
• 5V industrial equipment