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TI SN74LVC2G32DCURRoHS

Manufacturer
MPN
SN74LVC2G32DCUR
LCSC Part #
C91874
Packaging
VSSOP-8
Customer #
Key Attributes
Dual 2-Input Positive-OR Gate
Datasheetpdf iconTI SN74LVC2G32DCUR
In-Stock: 1,852
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QtyUnit PriceTotal Amount
1+$ 0.7077$ 0.71
10+$ 0.5564$ 5.56
30+$ 0.4913$ 14.74
100+$ 0.41$ 41.00
500+$ 0.3742$ 187.10
1,000+$ 0.3222$ 322.20
Standard Packaging3000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingVSSOP-8
Logic Family74LVC Series
Voltage - Supply1.65V~5.5V
Output Logic Level - Low450mV;300mV;400mV;550mV
Propagation Delay3.8ns@3.3V
FeaturesLive insertion protection;Local shutdown mode;Rear drive protection;Overvoltage-tolerant input
Input Logic Level - Low700mV;800mV
Input Logic Level - High1.7V;2V
Operating Temperature-40℃~+125℃
Output Logic Level - High1.2V;1.9V;2.4V;3.8V
Quiescent Current(Iq)10uA
Current - Output High(IOH)24mA
Number of Channels2;2
Current - Output Low(IOL)32mA

Introduction

AI Translation

This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G32 device performs the Boolean function Y = A + B or Y = (A • B)' in positive logic. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • Available in the NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Maximum tpd of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Maximum ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25℃
  • Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human Body Model (A114-A) 1000-V Charged-Device Model (C101)

Applications

AI Translation
  • Down Translation Logical OR