onsemi MC74HC165ADR2G

The MC74HC165A has the same pinout as the LS165. The inputs of this device are compatible with standard CMOS outputs; with pull-up resistors, they are compatible with LSTTL outputs. This device is an 8-bit shift register with complementary outputs at the final stage. Data can be loaded into the register in parallel or serial form. When the serial shift/parallel load input is low, data is loaded asynchronously in parallel. When the serial shift/parallel load input is high, data is loaded serially on the rising edge of the clock or clock inhibit signal (see function table). The 2-input NOR clock can be used by combining two independent clock sources, or by designating one of the clock inputs as a clock inhibit signal.

• Output drive capability: 10 LSTTL loads
• Outputs directly interface with CMOS, NMOS, and TTL
• Operating voltage range: 2.0 to 6.0V
• Low input current: 1μA
• High noise immunity characteristic of CMOS devices
• Meets requirements of JEDEC standard 7A
• Chip complexity: 286 FETs or 71.5 equivalent gates
• NLV prefix: for automotive and other applications requiring unique site and control change requirements; AEC-Q100 compliant and PPAP capable
• Lead-free, halogen-free, and RoHS compliant

• Automotive applications
• Other applications requiring unique site and change control requirements