LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
onsemi CAT24C512HU5EGT3 product image
  • CAT24C512HU5EGT3 thumbnail 1
  • CAT24C512HU5EGT3 thumbnail 2
  • CAT24C512HU5EGT3 thumbnail 3
  • Pinout
  • Footprint
Images for reference only

onsemi CAT24C512HU5EGT3RoHS

Manufacturer
MPN
CAT24C512HU5EGT3
LCSC Part #
C7228092
Packaging
UDFN-8(2x3)
Customer #
Key Attributes
512Kbit 1.8V~5.5V 1MHz I2C UDFN-8(2x3) Memory RoHS
Datasheetpdf icononsemi CAT24C512HU5EGT3
In-Stock: 2
2 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 1.5112$ 1.51
10+$ 1.4774$ 14.77
30+$ 1.4548$ 43.64
100+$ 1.4339$ 143.39
Standard Packaging3000/Full Reel
Better price for more quantity?
$

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
Manufactureronsemi
PackagingUDFN-8(2x3)
Operating Temperature-40℃~+125℃
FeaturesHardware write protection function;Built-in power-on reset (POR);Built-in error correction code (ECC) function;Noise suppression function
Memory Size512Kbit
Voltage - Supply1.8V~5.5V
Clock Frequency1MHz
Access Time3.5us;0.9us;0.4us
Data Retention - TDR (Year)100 Years
Current - Supply2.5mA
Write Cycle Time(tWC)5ms
Standby Supply Current5uA
Write Cycle Endurance1,000,000 cycles
InterfaceI2C

Introduction

AI Translation

The CAT24C512 is a EERPOM Serial 512−Kb I²C internally organized as 65,536 words of 8 bits each. It features a 128−byte page write buffer and supports the Standard (100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I²C protocol. Write operations can be inhibited by taking the WP pin High (this protects the entire memory). External address pins make it possible to address up to eight CAT24C512 devices on the same bus. On−Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.

Features

AI Translation
  • Supports Standard, Fast and Fast−Plus I²C Protocol
  • 1.8 V to 5.5 V Supply Voltage Range
  • 128−Byte Page Write Buffer
  • Hardware Write Protection for Entire Memory
  • Schmitt Triggers and Noise Suppression Filters on I²C Bus Inputs (SCL and SDA)
  • Low Power CMOS Technology
  • 1,000,000 Program/Erase Cycles
  • 100 Year Data Retention
  • Industrial and Extended Temperature Range
  • 8−pin, SOIC, TSSOP, 8−pad UDFN and 8−ball WLCSP Packages
  • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant