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SKYWORKS SI5347A-D07919-GMR product image
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SKYWORKS SI5347A-D07919-GMR

Manufacturer
MPN
SI5347A-D07919-GMR
LCSC Part #
C7011372
Packaging
QFN-64(9x9)
Customer #
Key Attributes
720MHz 1.8V~3.3V 8 QFN-64(9x9) Clock Generators, PLLs, Frequency Synthesizers RoHS
Datasheetpdf iconSKYWORKS SI5347A-D07919-GMR
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QtyUnit Price(Reference Only)Total Amount
1+$ 155.697$ 155.70
200+$ 62.1255$ 12425.10
500+$ 60.0494$ 30024.70
1,000+$ 59.0234$ 59023.40
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers
ManufacturerSKYWORKS
PackagingQFN-64(9x9)
Operating Temperature-40℃~+85℃
Output Frequency(Max)720MHz
Voltage - Supply1.8V~3.3V
FeaturesOn-chip VCO/DCO;Integrated clock jitter cleaner;Built-in phase-locked loop;Built-in clock monitoring and loss-of-lock detection;Automatic reference switching;Multi-source clock input
Number of Outputs8

Introduction

AI Translation

The Si5347 is a high-performance, jitter-attenuating clock multiplier which integrates four any-frequency DSPLLs for applications that require maximum integration and independent timing paths. The Si5346 is a dual DSPLL version in a smaller package. Each DSPLL has access to any of the four inputs and can provide low jitter clocks on any of the device outputs. Based on 4th generation DSPLL technology, these devices provide any-frequency conversion with typical jitter performance under 100 fs. Each DSPLL supports independent free-run, holdover modes of operation, as well as automatic and hitless input clock switching. The Si5347/46 is programmable via a serial interface with in-circuit programmable non-volatile memory so that it always powers up in a known configuration. Programming the Si5347/46 is easy with Skyworks' ClockBuilder Pro software. Factory preprogrammed devices are also available.

Features

AI Translation
  • Four or two independent DSPLLs, any output frequency from any input frequency
  • Ultra-low jitter of 95 fs rms
  • Input frequency range:
    • External Crystal: 25–54 MHz
    • Differential: 8 kHz to 750 MHz
    • LVCMOS: 8 kHz to 250 MHz
  • Output frequency range:
    • Differential: 100 Hz to 720 MHz
    • LVCMOS: 100 Hz to 250 MHz
  • Status Monitoring
  • Hitless switching
  • Four or two DSPLLs to synchronize to multiple inputs
  • Generates any combination of output frequencies from any input frequency
  • Ultra low jitter: 95 fs typ (12 kHz – 20 MHz)
  • Flexible crosspoints route any input to any output clock
  • Programmable jitter attenuation bandwidth per DSPLL: 0.1 Hz to 4 kHz
  • Highly configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL with programmable signal amplitude
  • Hitless input clock switching: automatic or manual
  • Locks to gapped clock inputs
  • Automatic free-run and holdover modes
  • Fastlock feature for low nominal bandwidths
  • Glitchless on-the-fly DSPLL frequency changes
  • DCO mode: as low as 0.01 ppb steps per DSPLL
  • Core voltage:
    • VDD: 1.8V ±5%
    • VDDA: 3.3 V ±5%
  • Independent output clock supply pins: 3.3, 2.5, or 1.8 V
  • Output-output skew:
    • Using same DSPLL: 65 ps (Max)
  • Serial interface: I2C or SPI
  • In-circuit programmable with non-volatile OTP memory
  • ClockBuilder Pro software simplifies device configuration
  • Temperature range: -40 to +85 °C
  • Pb-free, RoHS-6 compliant

Applications

AI Translation
  • OTN Muxponders and Transponders
  • 10/40/100G network line cards
  • GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
  • Carrier Ethernet switches
  • Broadcast video