Infineon CY9BF416SPMC-GK7E1

The MB9B410T Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and competitive cost. These series are based on the Arm Cortex-M3 Processor with on-chip Flash memory and SRAM, and has peripheral functions such as Motor Control Timers, ADCs and Communication Interfaces (CAN, UART, CSIO, I²C, LIN).

• 32-bit Arm Cortex-M3 Core
• Processor version: r2p1
• Up to 144 MHz Frequency Operation
• Memory Protection Unit (MPU): improves the reliability of an embedded system
• Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels
• 24-bit System timer (Sys Tick): System timer for OS task management
• On-chip Memories
• [Flash memory]
• Up to 1 Mbyte
• Built-in Flash Accelerator System with 16Kbyte trace buffer memory
• The read access to Flash memory can be achieved without wait cycle up to operation frequency of 72 MHz. Even at the operation frequency more than 72MHz, an equivalent access to Flash memory can be obtained by Flash Accelerator System.
• Security function for code protection
• [SRAM]
• This Series contain a total of up to 128 Kbyte on-chip SRAM memories. This is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus.
• SRAM0: Up to 64 Kbyte.
• SRAM1: Up to 64 Kbyte.
• External Bus Interface
• Supports SRAM, NOR and NAND Flash device
• Up to 8 chip selects
• 8-/16-bit Data width
• Up to 25-bit Address bit
• Maximum area size: Up to 256 Mbytes
• Supports Address/Data multiplex Supports external RDY input
• CAN Interface (Max. 2 channels)
• Compatible with CAN Specification 2.0A/B Maximum transfer rate: 1 Mbps Built-in 32 message buffer
• Multi-function Serial Interface (Max 8 channels)
• 4 channels with 16steps ×9-bit FIFO (ch.4 to ch.7), 4 channels without FIFO (ch.0 to ch.3)
• Operation mode is selectable from the followings for each channel.  UART  CSIO  LIN  I2C
• [UART]
• Full-duplex double buffer
• Selection with or without parity supported
• Built-in dedicated baud rate generator
• External clock available as a serial clock
• Hardware Flow control: Automatically control the transmission by CTS/RTS (only ch.4)
• Various error detect functions available (parity errors, framing errors, and overrun errors)
• [CSIO]
• Full-duplex double buffer Built-in dedicated baud rate generator Overrun error detect function available
• [LIN]
• LIN protocol Rev.2.1 supported Full-duplex double buffer
• Master/Slave mode supported
• LIN break field generate (can be changed 13-16-bit length)
• LIN break delimiter generate (can be changed 1-4-bit length)
• Various error detect functions available (parity errors, framing errors, and overrun errors)
• [I2C]
• Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps) supported
• DMA Controller (8 channels)
• DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously.
• 8 independently configured and operated channels
• Transfer can be started by software or request from the built-in peripherals
• Transfer address area: 32 bit (4 Gbyte)
• Transfer mode: Block transfer/Burst transfer/Demand transfer
• Transfer data type: byte/half-word/word
• Transfer block count: 1 to 16
• Number of transfers: 1 to 65536
• A/D Converter (Max 32 channels)
• [12-bit A/D Converter]
• Successive Approximation Register type
• Built-in 3unit
• Conversion time: 1.0 μs@ 5 V
• Priority conversion available (priority at 2 levels)
• Scanning conversion mode
• Built-in FIFO for conversion data storage (for SCAN conversion: 16 steps, for Priority conversion: 4 steps)
• Base Timer (Max 16 channels)
• Operation mode is selectable from the followings for each channel.
• 16-bit PWM timer
• 16-bit PPG timer
• 16-/32-bit reload timer
• 16-/32-bit PWC timer
• General Purpose I/O Port
• This series can use its pins as I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated.
• Capable of pull-up control per pin
• Capable of reading pin level directly
• Built-in the port relocate function
• Up 154 fast I/O Ports @ 176pin Package
• Some pin is 5 V tolerant I/O.
• Multi-function Timer (Max 3 units)
• The Multi-function timer is composed of the following blocks.
• 16-bit free-run timer × 3 ch/unit Input capture × 4 ch/unit Output compare × 6 ch/unit A/D activation compare × 3 ch/unit Waveform generator × 3 ch/unit 16-bit PPG timer × 3 ch/unit
• The following function can be used to achieve the motor control.
• PWM signal output function
• DC chopper waveform output function
• Dead time function
• Input capture function
• A/D convertor activate function
• DTIF (Motor emergency stop) interrupt function