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MICROCHIP dsPIC33EP128GS804-I/PT
| Manufacturer | |
| MPN | dsPIC33EP128GS804-I/PT |
| LCSC Part # | C634030 |
| Packaging | TQFP-44(10x10) |
| Customer # | |
| Key Attributes | 128KB 33 TQFP-44(10x10) Microcontrollers RoHS |
| Datasheet |  MICROCHIP dsPIC33EP128GS804-I/PT |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Maximum Speed | - | |
| FLASH Size | 128KB | |
| Number of I/O | 33 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| Operating Temperature | -40℃~+85℃ |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 3V~3.6V | |
| Maximum Speed | - | |
| FLASH Size | 128KB | |
| Number of I/O | 33 |
Report an ErrorShow similar products (0) >
Features
AI Translation
- Code-Efficient (C and Assembly) Architecture
- Two 40-Bit Wide Accumulators
- Single-Cycle (MAC/MPY) with Dual Data Fetch
- Single-Cycle Mixed-Sign MUL plus Hardware Divide
- 32-Bit Multiply Support
- Four Additional Working Register Sets (reduces context switching)
- ±0.9% Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Fail-Safe Clock Monitor (FSCM)
- Independent Watchdog Timer (WDT)
- Fast Wake-up and Start-up
- Low-Power Management modes (Sleep, Idle, Doze)
- Integrated Power-on Reset and Brown-out Reset
- 0.5 mA/MHz Dynamic Current (typical)
- 20 μA IPD Current (typical)
- Eight PWM Generators (two outputs per generator)
- Individual Time Base and Duty Cycle for each PWM
- 1.04 ns PWM Resolution (frequency, duty cycle, dead time and phase)
- Supports Center-Aligned, Redundant, Complementary and True Independent Output modes
- Independent Fault and Current-Limit Inputs
- Output Override Control
- 12-bit with four dedicated SAR ADC cores and one shared SAR ADC core
- Configurable resolution (up to 12-bit) for each ADC core
- Up to 3.25 Msps conversion rate per channel at 12-bit resolution
- 11 to 22 single-ended inputs
- Dedicated result buffer for each analog channel
- Flexible and independent ADC trigger sources
- Two digital comparators
- Two oversampling filters for increased resolution
- Four Rail-to-Rail Comparators with Hysteresis
- Dedicated 12-bit Digital-to-Analog Converter (DAC) for each analog comparator
- Up to two DAC reference outputs
- Up to two external reference inputs
- Two Programmable Gain Amplifiers
- Single-ended or independent ground reference
- Five selectable gains (4x, 8x, 16x, 32x and 64x)
- 40 MHz gain bandwidth
- Reduces CPU Interaction to Improve Performance
- Flexible PWM Trigger Options for ADC Conversions
- High-Speed Comparator Truncates PWM (15 ns typical)
- Supports Cycle-by-Cycle Current-mode control
- Current Reset mode (variable frequency)
- Five 16-Bit and up to Two 32-Bit Timers/Counters
- Four Output Compare (OC) modules, Configurable as Timers/Counters
- Four Input Capture (IC) modules
- Two UART modules (15 Mbps)
- Supports LIN/J2602 protocols and IrDA
- Three Variable Width SPI modules with Operating modes
- 3-wire SPI
- 8x6 or 8x8 FIFO mode
- I2S mode
- Two I2C modules (up to 1 Mbaud) with SMBus Support
- Up to Two CAN modules
- Four-Channel DMA
- Constant-Current Source (10 μA nominal)
- Sink/Source up to 12 mA/15 mA, respectively; Pin-Specific for Standard VOH/VOL
- 5V Tolerant Pins
- Selectable, Open-Drain Pull-ups and Pull-Downs
- External Interrupts on all I/O Pins
- Peripheral Pin Select (PPS) to allow Function Remap with Six Virtual I/Os
- AEC-Q100 REVG (Grade 1, -40℃ to +125℃)
- Class B Safety Library, IEC 60730
- The 6x6x0.55 mm UQFN Package is Designed and Optimized to ease IPC9592B 2nd Level Temperature Cycle Qualification
- In-Circuit and In-Application Programming
- Five Program and Three Complex Data Breakpoints
- IEEE 1149.2 Compatible (JTAG) Boundary Scan
- Trace and Run-Time Watch
- Four Configurable Logic Cells
- Peripheral Trigger Generator
Applications
AI Translation
- AC/DC
- DC/DC
- Inverters
- PFC
- Lighting
In-Stock: 5
5 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
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| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 12.5153 | $ 12.52 |
| 10+ | $ 12.1042 | $ 121.04 |
Standard Packaging160/Full Tray | ||
Better price for more quantity?
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Maximum Speed | - | |
| FLASH Size | 128KB | |
| Number of I/O | 33 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| Operating Temperature | -40℃~+85℃ |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 3V~3.6V | |
| Maximum Speed | - | |
| FLASH Size | 128KB | |
| Number of I/O | 33 |
Report an ErrorShow similar products (0) >
Features
AI Translation
- Code-Efficient (C and Assembly) Architecture
- Two 40-Bit Wide Accumulators
- Single-Cycle (MAC/MPY) with Dual Data Fetch
- Single-Cycle Mixed-Sign MUL plus Hardware Divide
- 32-Bit Multiply Support
- Four Additional Working Register Sets (reduces context switching)
- ±0.9% Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Fail-Safe Clock Monitor (FSCM)
- Independent Watchdog Timer (WDT)
- Fast Wake-up and Start-up
- Low-Power Management modes (Sleep, Idle, Doze)
- Integrated Power-on Reset and Brown-out Reset
- 0.5 mA/MHz Dynamic Current (typical)
- 20 μA IPD Current (typical)
- Eight PWM Generators (two outputs per generator)
- Individual Time Base and Duty Cycle for each PWM
- 1.04 ns PWM Resolution (frequency, duty cycle, dead time and phase)
- Supports Center-Aligned, Redundant, Complementary and True Independent Output modes
- Independent Fault and Current-Limit Inputs
- Output Override Control
- 12-bit with four dedicated SAR ADC cores and one shared SAR ADC core
- Configurable resolution (up to 12-bit) for each ADC core
- Up to 3.25 Msps conversion rate per channel at 12-bit resolution
- 11 to 22 single-ended inputs
- Dedicated result buffer for each analog channel
- Flexible and independent ADC trigger sources
- Two digital comparators
- Two oversampling filters for increased resolution
- Four Rail-to-Rail Comparators with Hysteresis
- Dedicated 12-bit Digital-to-Analog Converter (DAC) for each analog comparator
- Up to two DAC reference outputs
- Up to two external reference inputs
- Two Programmable Gain Amplifiers
- Single-ended or independent ground reference
- Five selectable gains (4x, 8x, 16x, 32x and 64x)
- 40 MHz gain bandwidth
- Reduces CPU Interaction to Improve Performance
- Flexible PWM Trigger Options for ADC Conversions
- High-Speed Comparator Truncates PWM (15 ns typical)
- Supports Cycle-by-Cycle Current-mode control
- Current Reset mode (variable frequency)
- Five 16-Bit and up to Two 32-Bit Timers/Counters
- Four Output Compare (OC) modules, Configurable as Timers/Counters
- Four Input Capture (IC) modules
- Two UART modules (15 Mbps)
- Supports LIN/J2602 protocols and IrDA
- Three Variable Width SPI modules with Operating modes
- 3-wire SPI
- 8x6 or 8x8 FIFO mode
- I2S mode
- Two I2C modules (up to 1 Mbaud) with SMBus Support
- Up to Two CAN modules
- Four-Channel DMA
- Constant-Current Source (10 μA nominal)
- Sink/Source up to 12 mA/15 mA, respectively; Pin-Specific for Standard VOH/VOL
- 5V Tolerant Pins
- Selectable, Open-Drain Pull-ups and Pull-Downs
- External Interrupts on all I/O Pins
- Peripheral Pin Select (PPS) to allow Function Remap with Six Virtual I/Os
- AEC-Q100 REVG (Grade 1, -40℃ to +125℃)
- Class B Safety Library, IEC 60730
- The 6x6x0.55 mm UQFN Package is Designed and Optimized to ease IPC9592B 2nd Level Temperature Cycle Qualification
- In-Circuit and In-Application Programming
- Five Program and Three Complex Data Breakpoints
- IEEE 1149.2 Compatible (JTAG) Boundary Scan
- Trace and Run-Time Watch
- Four Configurable Logic Cells
- Peripheral Trigger Generator
Applications
AI Translation
- AC/DC
- DC/DC
- Inverters
- PFC
- Lighting
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |