MICROCHIP SY89112UMY
| Manufacturer | |
| MPN | SY89112UMY |
| LCSC Part # | C633587 |
| Packaging | QFN-44 |
| Customer # | |
| Key Attributes | 2.375V~3.6V 3GHz 12 QFN-44 Clock Buffers, Drivers RoHS |
| Datasheet |  MICROCHIP SY89112UMY |
| Alternative Parts | 1 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-44 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.375V~3.6V | |
| Features | Multi-channel fan-out/isolation drive;Output enable/shutdown;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 3GHz | |
| Number of outputs | 12 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-44 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.375V~3.6V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Output enable/shutdown;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 3GHz | |
| Number of outputs | 12 |
Introduction
The SY89112U is a low-jitter, low-skew, high-speed LVPECL 1:12 differential fanout buffer optimized for precision telecom and enterprise server distribution applications. The input includes a 2:1 MUX for clock switchover application. Unlike other multiplexers, this input includes a unique isolation design to minimize channel-tochannel crosstalk. The SY89112U distributes clock frequencies from DC to >2GHz guaranteed over temperature and voltage. The SY89112U incorporates a synchronous output enable (EN) so that the outputs will only be enabled/disabled when they are already in the LOW state. This reduces the chance of generating “runt” clock pulses. The SY89112U differential input includes a unique, patent-pending 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. For AC-coupled input interface, an on-board output reference voltage (VREF-AC) is provided to bias the center-tap (VT) pin. The outputs are 800mV, 100K-compatible LVPECL with fast rise/fall times guaranteed to be less than 220ps. The SY89112U operates from a 2.5V±5% or 3.3V±10% supply and is guaranteed over the full industrial temperature range of -40°C to +85°C.
Features
- Selects between 1 of 2 inputs, and provides 12 precision, low skew LVPECL output copies
- Guaranteed AC performance over temperature and voltage:
- DC to >2GHz throughput
- <550ps propagation delay CLK-to-Q
- <220ps rise/fall time
- <25ps output-to-output skew
- Ultra-low jitter design:
- 50fsRMS phase jitter (typ.)
- <0.7psRMS crosstalk induced jitter
- Unique, patent-pending input termination and VT pin accepts DC-coupled and AC-coupled differential inputs
- Unique, patent-pending 2:1 input MUX provides superior isolation to minimize channel-to-channel crosstalk
- 800mV, 100K LVPECL output swing
- Power supply 2.5V±5% or 3.3V±10%
- Industrial temperature range -40°C to +85°C
- Available in 44-pin (7mm×7mm) QFN package
Applications
- Multi-processor server
- SONET/SDH clock/data distribution
- Fibre Channel distribution
- Gigabit Ethernet clock distribution
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 7.5862 | $ 7.59 |
| 260+ | $ 2.9357 | $ 763.28 |
| 520+ | $ 2.8339 | $ 1473.63 |
| 1,040+ | $ 2.7829 | $ 2894.22 |
Standard Packaging260/Full Tray | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-44 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.375V~3.6V | |
| Features | Multi-channel fan-out/isolation drive;Output enable/shutdown;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 3GHz | |
| Number of outputs | 12 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-44 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.375V~3.6V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Output enable/shutdown;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 3GHz | |
| Number of outputs | 12 |
Introduction
The SY89112U is a low-jitter, low-skew, high-speed LVPECL 1:12 differential fanout buffer optimized for precision telecom and enterprise server distribution applications. The input includes a 2:1 MUX for clock switchover application. Unlike other multiplexers, this input includes a unique isolation design to minimize channel-tochannel crosstalk. The SY89112U distributes clock frequencies from DC to >2GHz guaranteed over temperature and voltage. The SY89112U incorporates a synchronous output enable (EN) so that the outputs will only be enabled/disabled when they are already in the LOW state. This reduces the chance of generating “runt” clock pulses. The SY89112U differential input includes a unique, patent-pending 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. For AC-coupled input interface, an on-board output reference voltage (VREF-AC) is provided to bias the center-tap (VT) pin. The outputs are 800mV, 100K-compatible LVPECL with fast rise/fall times guaranteed to be less than 220ps. The SY89112U operates from a 2.5V±5% or 3.3V±10% supply and is guaranteed over the full industrial temperature range of -40°C to +85°C.
Features
- Selects between 1 of 2 inputs, and provides 12 precision, low skew LVPECL output copies
- Guaranteed AC performance over temperature and voltage:
- DC to >2GHz throughput
- <550ps propagation delay CLK-to-Q
- <220ps rise/fall time
- <25ps output-to-output skew
- Ultra-low jitter design:
- 50fsRMS phase jitter (typ.)
- <0.7psRMS crosstalk induced jitter
- Unique, patent-pending input termination and VT pin accepts DC-coupled and AC-coupled differential inputs
- Unique, patent-pending 2:1 input MUX provides superior isolation to minimize channel-to-channel crosstalk
- 800mV, 100K LVPECL output swing
- Power supply 2.5V±5% or 3.3V±10%
- Industrial temperature range -40°C to +85°C
- Available in 44-pin (7mm×7mm) QFN package
Applications
- Multi-processor server
- SONET/SDH clock/data distribution
- Fibre Channel distribution
- Gigabit Ethernet clock distribution
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| SY89112UMY-TR | MICROCHIP | QFN-44-EP(7x7) | 0 | $ 4.6798 |