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Nexperia TE28F128P30T85A product image
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Nexperia TE28F128P30T85A

Manufacturer
Nexperia
MPN
TE28F128P30T85A
LCSC Part #
C6331620
Packaging
TFSOP-56-18.4mm
Customer #
Key Attributes
128Mbit 1.7V~2V 52MHz Parallel TFSOP-56-18.4mm Memory
Datasheetpdf iconNexperia TE28F128P30T85A
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1+$ 31.2198$ 31.22
200+$ 12.4568$ 2491.36
500+$ 12.0415$ 6020.75
1,000+$ 11.8346$ 11834.60
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerNexperia
PackagingTFSOP-56-18.4mm
Operating Temperature-40℃~+85℃
Features-
Memory Size128Mbit
Voltage - Supply1.7V~2V
Program / Erase Cycles100,000 cycles
Clock Frequency52MHz
Data Retention - TDR (Year)-
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)85ns
Standby Supply Current20uA
InterfaceParallel
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Introduction

AI Translation

Numonyx StrataFlash Embedded Memory (P30) is the latest generation of Numonyx StrataFlash memory devices. Offering densities from 64-Mbit to 512-Mbit, P30 devices bring proven two-bits-per-cell storage technology to the embedded flash memory market segment. Benefits include higher density in a smaller footprint, high-speed interface, lowest cost-per-bit NOR devices, and support for both code and data storage. Features include high-performance synchronous burst read mode, fast asynchronous access time, low power consumption, flexible security options, and three industry-standard package options. The P30 product family is manufactured using Intel 130 nm ETOX VIII process technology. The P30 product family is also planned for Intel 65nm process photolithography. Changes to 65nm AC timing are documented in this datasheet and should be considered for all new designs.

Features

AI Translation
  • High performance
    • 85 ns initial access
      • 52 MHz with zero wait states
    • 17ns clock-to-data output synchronous-burst read mode
    • 25 ns asynchronous-page read mode
    • 4-, 8-, 16-, and continuous-word burst mode
    • Buffered Enhanced Factory Programming (BEFP) at 5 μs/byte (Typ)
    • 1.8 V buffered programming at 7 μs/byte (Typ)
  • Architecture
    • Multi-Level Cell Technology: Highest Density at Lowest Cost
    • Asymmetrically-blocked architecture
    • Four 32-KByte parameter blocks: top or bottom configuration
    • 128-KByte main blocks
  • Voltage and Power
    • VCC (core) voltage: 1.7 V - 2.0 V
    • VCCQ (I/O) voltage: 1.7 V - 3.6 V
    • Standby current: 20 μA (Typ) for 64-Mbit
    • 4-Word synchronous read current: 13 mA (Typ) at 40 MHz
  • Quality and Reliability
    • Operating temperature: -40 ℃ to +85 ℃
    • Minimum 100,000 erase cycles per block
    • ETOX VIII process technology
  • Security
    • One-Time Programmable Registers:
      • 64 unique factory device identifier bits
      • 2112 user-programmable OTP bits
    • Selectable OTP Space in Main Array:
      • Four pre-defined 128-KByte blocks (top or bottom configuration)
      • Up to Full Array OTP Lockout
    • Absolute write protection: VPP = VSS
    • Power-transition erase/program lockout
    • Individual zero-latency block locking
    • Individual block lock-down
  • Software
    • 20 μs (Typ) program suspend
    • 20 μs (Typ) erase suspend
    • Numonyx Flash Data Integrator optimized
    • Basic Command Set and Extended Command Set compatible
    • Common Flash Interface capable
  • Density and Packaging
    • 56- Lead TSOP package (64, 128, 256, 512- Mbit)
    • 64- Ball Numonyx Easy BGA package (64, 128, 256, 512- Mbit)
    • Numonyx QUAD + SCSP (64, 128, 256, 512- Mbit)
    • 16-bit wide data bus