Nexperia 74LVT16373ADGG,118
| Manufacturer | |
| MPN | 74LVT16373ADGG,118 |
| LCSC Part # | C548994 |
| Packaging | TSSOP-48-6.2mm |
| Customer # | |
| Key Attributes | 3.3 V 16-bit transparent D-type latch; 3-state |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-48-6.2mm | |
| Quiescent Current | 120uA | |
| Series | 74LVT | |
| Logic Type | D Latch | |
| Voltage - Supply | 2.7V~3.6V | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 64mA | |
| Output Type | Tri-State | |
| Setup Time | 0.1ns;0.2ns | |
| Number of Gates | 2 | |
| Current - Output High(IOH) | 32mA | |
| Hold Time | 0ns | |
| Propagation Delay | 2.1ns |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-48-6.2mm | |
| Quiescent Current | 120uA | |
| Series | 74LVT | |
| Logic Type | D Latch | |
| Voltage - Supply | 2.7V~3.6V | |
| Operating Temperature | -40℃~+85℃ |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | 64mA | |
| Output Type | Tri-State | |
| Setup Time | 0.1ns;0.2ns | |
| Number of Gates | 2 | |
| Current - Output High(IOH) | 32mA | |
| Hold Time | 0ns | |
| Propagation Delay | 2.1ns |
Introduction
The 74LVT16373A is a 16-bit D-type transparent latch with 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
Features
- 16-bit transparent latch
- 3-state buffers
- Wide supply voltage range from 2.7 V to 3.6 V
- BiCMOS high speed and output drive
- Output capability: +64 mA/-32 mA
- Direct interface with TTL levels
- Overvoltage tolerant inputs to 5.5 V
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion/extraction permitted
- Power-up reset
- Power-up 3-state
- No bus current loading when output is tied to 5 V bus
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
- Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 °C to 85 °C
Applications
- Data transmission
- Bus control
- Memory systems
- Communication equipment
- Computer peripherals
- Industrial automation
- Test and measurement equipment
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.919 | $ 0.92 |
| 10+ | $ 0.7433 | $ 7.43 |
| 30+ | $ 0.6555 | $ 19.67 |
| 100+ | $ 0.5677 | $ 56.77 |
| 500+ | $ 0.5156 | $ 257.80 |
| 1,000+ | $ 0.488 | $ 488.00 |
Standard Packaging2000/Full Reel | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-48-6.2mm | |
| Quiescent Current | 120uA | |
| Series | 74LVT | |
| Logic Type | D Latch | |
| Voltage - Supply | 2.7V~3.6V | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 64mA | |
| Output Type | Tri-State | |
| Setup Time | 0.1ns;0.2ns | |
| Number of Gates | 2 | |
| Current - Output High(IOH) | 32mA | |
| Hold Time | 0ns | |
| Propagation Delay | 2.1ns |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-48-6.2mm | |
| Quiescent Current | 120uA | |
| Series | 74LVT | |
| Logic Type | D Latch | |
| Voltage - Supply | 2.7V~3.6V | |
| Operating Temperature | -40℃~+85℃ |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | 64mA | |
| Output Type | Tri-State | |
| Setup Time | 0.1ns;0.2ns | |
| Number of Gates | 2 | |
| Current - Output High(IOH) | 32mA | |
| Hold Time | 0ns | |
| Propagation Delay | 2.1ns |
Introduction
The 74LVT16373A is a 16-bit D-type transparent latch with 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
Features
- 16-bit transparent latch
- 3-state buffers
- Wide supply voltage range from 2.7 V to 3.6 V
- BiCMOS high speed and output drive
- Output capability: +64 mA/-32 mA
- Direct interface with TTL levels
- Overvoltage tolerant inputs to 5.5 V
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion/extraction permitted
- Power-up reset
- Power-up 3-state
- No bus current loading when output is tied to 5 V bus
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
- Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 °C to 85 °C
Applications
- Data transmission
- Bus control
- Memory systems
- Communication equipment
- Computer peripherals
- Industrial automation
- Test and measurement equipment
C548994 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



