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Nexperia 74LV04PW,118 product image
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Nexperia 74LV04PW,118

Manufacturer
Nexperia
MPN
74LV04PW,118
LCSC Part #
C547867
Packaging
TSSOP-14
Customer #
Key Attributes
Hex inverter
Datasheetpdf iconNexperia 74LV04PW,118
RoHS Compliance1 documents available
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QtyUnit Price(Reference Only)Total Amount
5+$ 0.3859$ 1.93
50+$ 0.3043$ 15.22
150+$ 0.2693$ 40.40
500+$ 0.2256$ 112.80
2,500+$ 0.2062$ 515.50
5,000+$ 0.1945$ 972.50
Standard Packaging2500/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingTSSOP-14
Input Type-
Logic Family74LV
Voltage - Supply1V~5.5V
Output Logic Level - Low-
Propagation Delay8ns@3.3V,50pF
Features-
Input Logic Level - High900mV~2V
Operating Temperature-40℃~+125℃
Input Logic Level - Low800mV
Number of Circuits6
Output Logic Level - High-
Quiescent Current(Iq)40uA
Current - Output High(IOH)12mA
Current - Output Low(IOL)12mA
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Introduction

AI Translation

The 74LV04 is a hex inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

Features

AI Translation
  • Wide supply voltage range from 1.0 V to 5.5 V
  • CMOS low power dissipation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Optimized for low voltage applications: 1.0 V to 3.6 V
  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
  • Typical HIGH-level output voltage (V0H) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
  • Complies with JEDEC standards: JESD8 - 7 (1.65 V to 1.95 V), JESD8 - 5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS - 001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS - 002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

AI Translation
  • Low-voltage applications
  • TTL input level compatible