Nexperia 74HC4046ADB,118
| Manufacturer | |
| MPN | 74HC4046ADB,118 |
| LCSC Part # | C546977 |
| Packaging | SSOP-16-208mil |
| Customer # | |
| Key Attributes | SSOP-16-208mil Clock Generators, PLLs, Frequency Synthesizers RoHS |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Nexperia | |
| Packaging | SSOP-16-208mil | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Nexperia |
| Type | Description | |
|---|---|---|
| Packaging | SSOP-16-208mil | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop |
Introduction
The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. The 74HC4046A; 74HCT4046A is a phase-locked-loop circuit that comprises a linear VCO and three different phase comparators (PC1, PC2 and PC3). It has a common signal input amplifier and a common comparator input. The signal input can be directly coupled to a large voltage signal, or indirectly coupled (with a series capacitor) to a small voltage signal. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 74HC4046A; 74HCT4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op amp techniques.
Features
- Low power consumption
- VCO-Inhibit control for ON/OFF keying and for low standby power consumption
- Center frequency up to 17 MHz (typical) at VCC = 4.5 V
- Choice of three phase comparators: PC1: EXCLUSIVE-OR PC2: Edge-triggered J-K flip-flop PC3: Edge-triggered RS flip-flop
- Excellent Voltage Controlled Oscillator (VCO) linearity
- Low frequency drift with supply voltage and temperature variations
- Operating power supply voltage range: VCO section 3.0 V to 6.0 V, Digital section 2.0 V to 6.0 V
- Zero voltage offset due to operational amplifier buffering
- ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V
Applications
- FM modulation and demodulation
- Frequency synthesis and multiplication
- Frequency discrimination
- Tone decoding
- Data synchronization and conditioning
- Voltage-to-frequency conversion
- Motor-speed control
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 1.0022 | $ 1.00 |
| 10+ | $ 0.8476 | $ 8.48 |
| 30+ | $ 0.762 | $ 22.86 |
| 100+ | $ 0.6671 | $ 66.71 |
| 500+ | $ 0.6243 | $ 312.15 |
| 1,000+ | $ 0.6044 | $ 604.40 |
Standard Packaging2000/Full Reel | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Nexperia | |
| Packaging | SSOP-16-208mil | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Nexperia |
| Type | Description | |
|---|---|---|
| Packaging | SSOP-16-208mil | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop |
Introduction
The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. The 74HC4046A; 74HCT4046A is a phase-locked-loop circuit that comprises a linear VCO and three different phase comparators (PC1, PC2 and PC3). It has a common signal input amplifier and a common comparator input. The signal input can be directly coupled to a large voltage signal, or indirectly coupled (with a series capacitor) to a small voltage signal. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 74HC4046A; 74HCT4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op amp techniques.
Features
- Low power consumption
- VCO-Inhibit control for ON/OFF keying and for low standby power consumption
- Center frequency up to 17 MHz (typical) at VCC = 4.5 V
- Choice of three phase comparators: PC1: EXCLUSIVE-OR PC2: Edge-triggered J-K flip-flop PC3: Edge-triggered RS flip-flop
- Excellent Voltage Controlled Oscillator (VCO) linearity
- Low frequency drift with supply voltage and temperature variations
- Operating power supply voltage range: VCO section 3.0 V to 6.0 V, Digital section 2.0 V to 6.0 V
- Zero voltage offset due to operational amplifier buffering
- ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V
Applications
- FM modulation and demodulation
- Frequency synthesis and multiplication
- Frequency discrimination
- Tone decoding
- Data synchronization and conditioning
- Voltage-to-frequency conversion
- Motor-speed control
C546977 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

