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Nexperia 74AUP1G97GS,132 product image
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Nexperia 74AUP1G97GS,132RoHS

Manufacturer
Nexperia
MPN
74AUP1G97GS,132
LCSC Part #
C545924
Packaging
XSON-6(1x1)
Customer #
Key Attributes
Schmitt trigger 800mV~3.6V 4mA 900nA 4mA 1 XSON-6(1x1) Gates and Inverters - Multi-Function, Configurable RoHS
Datasheetpdf iconNexperia 74AUP1G97GS,132
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QtyUnit Price(Reference Only)Total Amount
1+$ 0.2874$ 0.29
200+$ 0.1113$ 22.26
500+$ 0.1074$ 53.70
1,000+$ 0.1054$ 105.40
Standard Packaging5000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable
ManufacturerNexperia
PackagingXSON-6(1x1)
output type-
Logic Family74AUP Series
Input typeSchmitt trigger
Propagation Delay6.6ns@3V,30pF
Voltage - Supply800mV~3.6V
Operating Temperature-40℃~+125℃
Output Logic Level - Low-
Input Logic Level - High-
Input Logic Level - Low-
Current - Output Low(IOL)4mA
Output Logic Level - High-
Quiescent Current(Iq)900nA
Current - Output High(IOH)4mA
FeaturesLocal shutdown mode;Overvoltage-tolerant input
Number of Gates1
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Introduction

AI Translation

The 74AUP1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 0.8 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V)
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Overvoltage tolerant inputs to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃