Chipanalog CA-IS3021S

The CA-IS302x series are complete bidirectional, dual-channel digital isolators offering 3.75kV_RMS (narrow-body package) or 5kV_RMS (wide-body package) galvanic isolation and typical CMTI of ±150kV/μs. All devices feature Schmitt-trigger inputs for enhanced noise immunity. The digital input and output of each isolation channel are separated by a silicon dioxide (SiO₂) dielectric barrier, providing superior EMI suppression and low-EMI characteristics. The highly integrated design requires only two external VDDA and VDDB bypass capacitors and pull-up resistors to implement an I²C isolation interface. These dual-channel digital isolators support DC to 2.0MHz data rates. The CA-IS3020 provides two bidirectional, open-drain output isolation channels for bidirectional isolation applications such as multi-master I²C that require bidirectional data or clock transmission on the same bus. The CA-IS3021 provides one unidirectional and one bidirectional isolation channel for single-master I²C isolation applications, with the unidirectional channel used for clock (SCL) isolation and the bidirectional channel for data (SDA) isolation. The device's Side A (V_DDA) and Side B (V_DDB) are independently powered with a supply voltage range of 3.0V to 5.5V. The CA-IS302x series operates over a temperature range of −40°C to +125°C and is available in 8-pin narrow-body SOIC, 8-pin wide-body SOIC, and 16-pin wide-body SOIC packages. The wide operating temperature range and high isolation voltage rating make these devices ideal for harsh industrial environments. The CA-IS302x dual-channel digital isolators provide a complete bidirectional digital isolation solution, withstanding isolation voltages up to 3.75kV_RMS (narrow-body package) or 5kV_RMS (wide-body package) with typical CMTI of ±150kV/μs. Unlike a simple parallel combination of two unidirectional isolators, these bidirectional digital isolators fundamentally eliminate the low-level bus latch-up issue without requiring external anti-lockup circuitry, effectively saving board space and reducing power consumption. Schmitt-trigger inputs improve noise immunity, and capacitive isolation (SiO₂) is used between the logic input and output of each digital channel. Within the series, the CA-IS3020 offers two bidirectional, open-drain output digital isolation channels to meet the data and clock isolation requirements of multi-master I²C buses; the CA-IS3021 contains one unidirectional channel and one bidirectional channel for clock (SCL) and data (SDA) line isolation, respectively, in single-master I²C bus applications. All devices support data rates up to 2.0MHz. The logic levels on each side of the isolator are determined by the supply voltages V_DDA and V_DDB, with a supply range of 3.0V to 5.5V. The CA-IS302x employs capacitive isolation technology, which compared to inductive isolation offers lower power consumption, lower propagation delay and signal jitter, better EMI suppression, and support for higher signal transmission rates. To implement bidirectional channels, each bidirectional channel in the CA-IS302x integrates two unidirectional channels, with open-drain outputs to comply with the standard I²C interface requirements. Side A is designed to connect to low-capacitance I²C node loads with a maximum allowable load capacitance of 40pF; Side B is designed to connect to high-capacitance I²C bus node loads with a maximum allowable load capacitance of 400pF. In bidirectional isolation channels, to prevent bus latch-up, Side A output uses a special buffer that sets the logic-low output voltage at approximately 700mV, while the maximum logic-low input threshold voltage is 400mV. An internal hysteresis comparator detects the low-level voltage on the SDAA and SCLA pins to determine whether the logic low originates from an external input or from the isolator's own output. This comparator prevents the isolator from mistakenly interpreting the Side A low output as a logic-low input and propagating it to the Side B output, thereby eliminating bus latch-up. Side B uses a conventional buffer with no adjustment to the logic-low voltage level. A logic-low input on one side of the isolator pulls the corresponding pin on the other side low. The I²C bus enables data communication between different ICs (system controllers, remote sensors, actuators, and other circuits) through a 2-wire interface consisting of a data line (SDA) and a clock line (SCL), allowing multiple slave devices to share the same bus without requiring chip-select signals. Since only one data line is available on the bus, half-duplex operation is required — data can only be transmitted or received at any given time — so the data line must support bidirectional transfer. In multi-master systems, both the data and clock lines must support bidirectional transfer. The CA-IS302x series digital isolators provide either two bidirectional channels (CA-IS3020) or one bidirectional channel for data and one unidirectional channel for clock (CA-IS3021) to meet I²C bus isolation requirements. The I²C bus operates in Standard Mode, Fast Mode, or High-Speed Mode, with maximum rates of 100kbps, 400kbps, and 1.7Mbps (C_bus = 400pF), respectively. The CA-IS302x digital isolators support operating frequencies up to 2.0MHz, satisfying the requirements of the vast majority of I²C applications.

• DC to 2.0MHz bidirectional data transfer
• Reliable digital signal electrical isolation
• Long operating lifetime: >40 years
• 3.75kV_RMS (narrow-body package) and 5.0kV_RMS (wide-body package) electrical isolation
• ±150kV/μs typical CMTI
• Schmitt trigger input for enhanced noise immunity
• High EMI immunity, withstands ±10kV surge
• ±8kV ESD protection (human body model)
• Open-drain output: up to 3.5mA sink current on side A, up to 35mA sink current on side B
• Narrow-body SOIC8 - NB(S) package
• Wide-body SOIC8 - WB(G) package
• Wide-body SOIC16 - WB(W) package

• I2C, SMBus, PMBus interface
• Motor control systems
• Medical devices
• Battery management systems
• Instrumentation