JSCJ CJ74HC595AEN

CJ74HC/HCT595 is an 8-bit serial-in/serial-or-parallel-out shift register with storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) for cascading, along with an asynchronous reset input (/MR). A low level on /MR resets the shift register. Data is shifted on the low-to-high transition of the SHCP input. Data in the shift register is transferred to the storage register on the low-to-high transition of the STCP input. When both clocks are connected together, the shift register always advances one clock pulse ahead of the storage register. When the output enable input (/OE) is low, the data in the storage register appears at the outputs. When /OE is high, the outputs are in a high-impedance off-state. Operation of the /OE input does not affect the state of the registers. The inputs include clamping diodes, enabling the use of current-limiting resistors to interface the inputs to voltages higher than VCC.

• Input levels: CMOS for CJ74HC595; TTL for CJ74HCT595
• 8-bit serial input
• 8-bit serial or parallel output
• Storage register with 3-state outputs
• Shift register with direct clear
• Operating temperature range: -40°C to +125°C

• Network switches
• Power infrastructure
• LED displays
• Servers