JSCJ CJ74HC259AEN
| Manufacturer | JSCJAsian Brands |
| MPN | CJ74HC259AEN |
| LCSC Part # | C52145533 |
| Packaging | SOP-16 |
| Customer # | |
| Key Attributes | Addressable Latch 0.5V~7V 8 18ns SOP-16 Latches RoHS |
| Datasheet |  JSCJ CJ74HC259AEN |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSCJ | |
| Packaging | SOP-16 | |
| Quiescent Current | 8uA | |
| Logic Type | Addressable Latch | |
| Series | 74HC | |
| Voltage - Supply | 0.5V~7V | |
| Output Type | - | |
| Current - Output Low(IOL) | - | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output High(IOH) | - | |
| Setup Time | 16ns | |
| Number of Gates | 8 | |
| Hold Time | 0ns | |
| Propagation Delay | 18ns |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSCJ | |
| Packaging | SOP-16 | |
| Quiescent Current | 8uA | |
| Logic Type | Addressable Latch | |
| Series | 74HC | |
| Voltage - Supply | 0.5V~7V | |
| Output Type | - |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | - | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output High(IOH) | - | |
| Setup Time | 16ns | |
| Number of Gates | 8 | |
| Hold Time | 0ns | |
| Propagation Delay | 18ns |
Introduction
The CJ74HC/HCT259 is an 8-bit addressable latch. The device features four operating modes. In the addressable latch mode, data at the D input is written to the latch addressed by inputs A0 through A3. The addressed latch follows the data input, while unaddressed latches retain their previous state. In the memory mode, all latches retain their previous state regardless of data or address inputs. In the 3-line-to-8-line decoding or demultiplexing mode, the addressed output follows the D input while all other outputs are held low. In the reset mode, all outputs are forced low regardless of data or address inputs. The inputs include clamping diodes, which allow the input interface to be connected to voltages exceeding VCC by using current-limiting resistors.
Features
- Input levels: CMOS for CJ74HC259; TTL for CJ74HCT259
- Combines demultiplexer and 8-bit latch functions
- Serial-to-parallel conversion capability
- Individual output for each storage bit
- Random (addressable) data input support
- Easy cascading/expansion
- Common reset input
- Usable as 3-line to 8-line active-HIGH decoder
- Operating temperature range: -40℃ to +125℃
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 0.3931 | $ 0.39 |
| 200+ | $ 0.1569 | $ 31.38 |
| 500+ | $ 0.1517 | $ 75.85 |
| 1,000+ | $ 0.1491 | $ 149.10 |
Standard Packaging2500/Full Reel | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSCJ | |
| Packaging | SOP-16 | |
| Quiescent Current | 8uA | |
| Logic Type | Addressable Latch | |
| Series | 74HC | |
| Voltage - Supply | 0.5V~7V | |
| Output Type | - | |
| Current - Output Low(IOL) | - | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output High(IOH) | - | |
| Setup Time | 16ns | |
| Number of Gates | 8 | |
| Hold Time | 0ns | |
| Propagation Delay | 18ns |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSCJ | |
| Packaging | SOP-16 | |
| Quiescent Current | 8uA | |
| Logic Type | Addressable Latch | |
| Series | 74HC | |
| Voltage - Supply | 0.5V~7V | |
| Output Type | - |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | - | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output High(IOH) | - | |
| Setup Time | 16ns | |
| Number of Gates | 8 | |
| Hold Time | 0ns | |
| Propagation Delay | 18ns |
Introduction
The CJ74HC/HCT259 is an 8-bit addressable latch. The device features four operating modes. In the addressable latch mode, data at the D input is written to the latch addressed by inputs A0 through A3. The addressed latch follows the data input, while unaddressed latches retain their previous state. In the memory mode, all latches retain their previous state regardless of data or address inputs. In the 3-line-to-8-line decoding or demultiplexing mode, the addressed output follows the D input while all other outputs are held low. In the reset mode, all outputs are forced low regardless of data or address inputs. The inputs include clamping diodes, which allow the input interface to be connected to voltages exceeding VCC by using current-limiting resistors.
Features
- Input levels: CMOS for CJ74HC259; TTL for CJ74HCT259
- Combines demultiplexer and 8-bit latch functions
- Serial-to-parallel conversion capability
- Individual output for each storage bit
- Random (addressable) data input support
- Easy cascading/expansion
- Common reset input
- Usable as 3-line to 8-line active-HIGH decoder
- Operating temperature range: -40℃ to +125℃
C52145533 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |