MaxLinear ST16C2552IJ44-F
| Manufacturer | |
| MPN | ST16C2552IJ44-F |
| LCSC Part # | C517965 |
| Packaging | PLCC-44(17.4x17.4) |
| Customer # | |
| Key Attributes | PLCC-44(17.4x17.4) UARTs (Universal Asynchronous Receiver Transmitter) RoHS |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/UARTs (Universal Asynchronous Receiver Transmitter) | |
| Manufacturer | MaxLinear | |
| Packaging | PLCC-44(17.4x17.4) | |
| Features | Hardware flow control support;Fractional baud rate generator;Internal loopback/self-test mode |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/UARTs (Universal Asynchronous Receiver Transmitter) | |
| Manufacturer | MaxLinear |
| Type | Description | |
|---|---|---|
| Packaging | PLCC-44(17.4x17.4) | |
| Features | Hardware flow control support;Fractional baud rate generator;Internal loopback/self-test mode |
Introduction
The ST16C2552 (2552) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the PC16552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem control interface, and data rates up to 4 Mbps. Onboard status registers provide the user with error indications and operational status. System interrupts and modem control features may be tailored by external software to meet specific user requirements. Indepedendent programmable baud rate generators are privded to select transmit and receive clock rates from 50 Bps to 4 Mbps. The baud rate generator can be configured for either crystal or external clock input. An internal loop-back capability allows onboard diagnostics. The 2552 provides block mode data transfers (DMA) through FIFO controls. DMA transfer monitoring is provided through the signals TXRDY# and RXRDY#. An Alternate Function Register provides the user with the ability to initialize both UARTs concurrently. The 2552 is available in the 44-PLCC package.
The 2552 provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is required with digital data systems. Synchronization for the serial data stream is accomplished by adding start and stops bits to the transmit data to form a data character (character orientated protocol). Data integrity is ensured by attaching a parity bit to the data character. The parity bit is checked by the receiver for any transmission bit errors. The electronic circuitry to provide all these functions is fairly complex especially when manufactured on a single integrated silicon chip. The 2552 represents such an integration with greatly enhanced features. The 2552 is fabricated with an advanced CMOS process.
The 2552 is an upward solution that provides a dual UART capability with 16 bytes of transmit and receive FIFO memory, instead of none in the 16C2450. The 2552 is designed to work with high speed modems and shared network environments, that require fast data processing time. Increased performance is realized in the 2552 by the transmit and receive FIFO’s. This allows the external processor to handle more networking tasks within a given time. The FIFO memory greatly reduces the bandwidth requirement of the external controlling CPU, increases performance, and reduces power consumption.
The 2552 is capable of operation up to 4 Mbps with a 64 MHz clock. With a crystal or external clock input of 14.7456 MHz the user can select data rates up to 921.6 Kbps.
The rich feature set of the 2552 is available through internal registers. Selectable receive FIFO trigger levels, selectable TX and RX baud rates, and modem interface controls are all standard features. Following a power on reset or an external reset, the 2552 is software compatible with the 16L2752 and 16C2852.
Features
- Added feature in devices with top marking "A2 YYWW" and newer:
- 5 Volt Tolerant Inputs
- Pin-to-pin and functionally compatible to National PC16552 and Exar’s XR16L2752 and XR16C2852
- 4 Mbps transmit/receive operation (64 MHz External Clock Frequency)
- 2 Independent UART Channels
- Register Set Compatible to 16C550
- 16 byte Transmit FIFO to reduce the bandwidth requirement of the external CPU
- 16 byte Receive FIFO with error tags to reduce the bandwidth requirement of the external CPU
- 4 selectable RX FIFO Trigger Levels
- Fixed Transmit FIFO interrupt trigger level
- Full Modem Interface (CTS#, RTS#, DSR#, DTR#, RI#, CD#)
- DMA operation and DMA monitoring via TXRDY# and RXRDY# pins
- UART internal register sections A & B may be written to concurrently
- Multi-Function output allows more package functions with few I/O pins
- Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity
- Crystal oscillator or external clock input
Applications
- Portable Appliances
- Telecommunication Network Routers
- Ethernet Network Routers
- Cellular Data Devices
- Factory Automation and Process Controls
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 6.2298 | $ 6.23 |
| 10+ | $ 6.0841 | $ 60.84 |
| 30+ | $ 5.9859 | $ 179.58 |
| 100+ | $ 5.8893 | $ 588.93 |
Standard Packaging27/Full Tray | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/UARTs (Universal Asynchronous Receiver Transmitter) | |
| Manufacturer | MaxLinear | |
| Packaging | PLCC-44(17.4x17.4) | |
| Features | Hardware flow control support;Fractional baud rate generator;Internal loopback/self-test mode |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/UARTs (Universal Asynchronous Receiver Transmitter) | |
| Manufacturer | MaxLinear |
| Type | Description | |
|---|---|---|
| Packaging | PLCC-44(17.4x17.4) | |
| Features | Hardware flow control support;Fractional baud rate generator;Internal loopback/self-test mode |
Introduction
The ST16C2552 (2552) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the PC16552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem control interface, and data rates up to 4 Mbps. Onboard status registers provide the user with error indications and operational status. System interrupts and modem control features may be tailored by external software to meet specific user requirements. Indepedendent programmable baud rate generators are privded to select transmit and receive clock rates from 50 Bps to 4 Mbps. The baud rate generator can be configured for either crystal or external clock input. An internal loop-back capability allows onboard diagnostics. The 2552 provides block mode data transfers (DMA) through FIFO controls. DMA transfer monitoring is provided through the signals TXRDY# and RXRDY#. An Alternate Function Register provides the user with the ability to initialize both UARTs concurrently. The 2552 is available in the 44-PLCC package.
The 2552 provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is required with digital data systems. Synchronization for the serial data stream is accomplished by adding start and stops bits to the transmit data to form a data character (character orientated protocol). Data integrity is ensured by attaching a parity bit to the data character. The parity bit is checked by the receiver for any transmission bit errors. The electronic circuitry to provide all these functions is fairly complex especially when manufactured on a single integrated silicon chip. The 2552 represents such an integration with greatly enhanced features. The 2552 is fabricated with an advanced CMOS process.
The 2552 is an upward solution that provides a dual UART capability with 16 bytes of transmit and receive FIFO memory, instead of none in the 16C2450. The 2552 is designed to work with high speed modems and shared network environments, that require fast data processing time. Increased performance is realized in the 2552 by the transmit and receive FIFO’s. This allows the external processor to handle more networking tasks within a given time. The FIFO memory greatly reduces the bandwidth requirement of the external controlling CPU, increases performance, and reduces power consumption.
The 2552 is capable of operation up to 4 Mbps with a 64 MHz clock. With a crystal or external clock input of 14.7456 MHz the user can select data rates up to 921.6 Kbps.
The rich feature set of the 2552 is available through internal registers. Selectable receive FIFO trigger levels, selectable TX and RX baud rates, and modem interface controls are all standard features. Following a power on reset or an external reset, the 2552 is software compatible with the 16L2752 and 16C2852.
Features
- Added feature in devices with top marking "A2 YYWW" and newer:
- 5 Volt Tolerant Inputs
- Pin-to-pin and functionally compatible to National PC16552 and Exar’s XR16L2752 and XR16C2852
- 4 Mbps transmit/receive operation (64 MHz External Clock Frequency)
- 2 Independent UART Channels
- Register Set Compatible to 16C550
- 16 byte Transmit FIFO to reduce the bandwidth requirement of the external CPU
- 16 byte Receive FIFO with error tags to reduce the bandwidth requirement of the external CPU
- 4 selectable RX FIFO Trigger Levels
- Fixed Transmit FIFO interrupt trigger level
- Full Modem Interface (CTS#, RTS#, DSR#, DTR#, RI#, CD#)
- DMA operation and DMA monitoring via TXRDY# and RXRDY# pins
- UART internal register sections A & B may be written to concurrently
- Multi-Function output allows more package functions with few I/O pins
- Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity
- Crystal oscillator or external clock input
Applications
- Portable Appliances
- Telecommunication Network Routers
- Ethernet Network Routers
- Cellular Data Devices
- Factory Automation and Process Controls
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 5A991B1 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 5A991B1 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

