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TI SN74LVC1T45DBVRE4 product image
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TI SN74LVC1T45DBVRE4RoHS

Manufacturer
TI
MPN
SN74LVC1T45DBVRE4
LCSC Part #
C4364049
Packaging
SOT-23-6
Customer #
Key Attributes
SOT-23-6 Translators, Level Shifters RoHS
Datasheetpdf iconTI SN74LVC1T45DBVRE4
In-Stock: 100
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Minimum: 5Multiple: 5Sales Unit: Piece
QtyUnit PriceTotal Amount
5+$ 0.0699$ 0.35
50+$ 0.0683$ 3.42
150+$ 0.0673$ 10.10
500+$ 0.0662$ 33.10
Standard Packaging3000/Full Reel

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Translators, Level Shifters
ManufacturerTI
PackagingSOT-23-6
Interface-
FeaturesPower-off protection;Output enable high-impedance
Current - Output High(IOH)-
Current - Output Low(IOL)-
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Introduction

AI Translation

This 1-bit non-inverting bus transceiver uses two separate configurable power rails. Port A is designed to track VCCA. VCCA accepts any supply voltage ranging from 1.65V to 5.5V. Port B is designed to track VCCB. VCCB accepts any supply voltage ranging from 1.65V to 5.5V. This enables universal low-voltage bidirectional translation between 1.8V, 2.5V, 3.3V, and 5V voltage nodes. The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic level of the direction control (DIR) input activates either Port B or Port A output. When Port B output is activated, the device transmits data from bus A to bus B; when Port A output is activated, the device transmits data from bus B to bus A. The input circuits on Port A and Port B are always active and must be driven to a logic high or low level to prevent excessive ICC and ICCZ. The SN74LVC1T45 is designed to power the DIR input circuit through VCCA. The device fully complies with the specifications for partial power-down applications using Ioff. The Ioff circuit disables the outputs, preventing damaging backflow current through the device when it is powered down. The VCC isolation feature ensures that if either VCC is grounded, both ports are placed in a high-impedance state. NanoFree package technology represents a major breakthrough in IC packaging concepts, using the silicon die itself as the package.

Features

AI Translation
  • ESD protection exceeds JESD 22 specification requirements
  • 2000V Human Body Model (A114-A), 200V Machine Model (A115-A), 1000V Charged Device Model (C101)
  • NanoFree package
  • Fully configurable dual-rail design, supports each port operating across the full supply voltage range of 1.65V to 5.5V
  • VCC isolation feature – if any VCC input is tied to GND, both ports enter high-impedance state
  • DIR input referenced to VCCA
  • Low power consumption, ICC maximum 4μA
  • Output drive ±24mA at 3.3V
  • Ioff supports partial power-down mode operation
  • Maximum data rate 420Mbps (3.3V to 5V translation)
  • 210Mbps (translation to 3.3V)
  • 140Mbps (translation to 2.5V)
  • 75Mbps (translation to 1.8V)
  • Latch-up performance exceeds 100mA, compliant with JESD 78 Class II specification

Applications

AI Translation
  • Consumer Electronics
  • Industrial
  • Enterprise
  • Telecom