Rochester Electronics 26S12APC

The AM26S12/AM26S12A are high-speed quadruple bus transceivers consisting of four high-speed bus drivers with open-collector outputs and four high-speed bus receivers. The open-collector outputs are capable of sinking 100mA at 0.7 volts. Each driver output is brought out and internally connected to a high-speed bus receiver. The receivers feature input hysteresis and TTL outputs capable of driving ten TTL loads. A active-low dual-input AND gate controls the four drivers so that outputs of different device drivers can be tied together for bus operation. The enable input is conveniently driven by active-low decoders such as the AM54S/74S139. The high drive capability in the low state allows bus operation with line impedances as low as 100Ω. The line can be terminated at both ends with still considerable noise margin at the receivers. The hysteresis of the AM26S12 receiver is selected so that when the receiver input is at a high logic level, the receiver output typically switches to a high logic level when the input voltage reaches 1.4 volts; when the receiver input is at a low logic level, the receiver output typically switches to a low logic level when the input voltage reaches 2.0 volts. This hysteresis makes the receivers very insensitive to noise on the bus. The AM26S12A is functionally identical to the AM26S12 but features different hysteresis characteristics, with outputs typically switching at input levels of 1.2 volts or 2.25 volts. In both devices, the threshold margin (the difference between switching points) is greater than 0.4 volts.

• Quad high-speed bus transceiver
• Driver output typically sinks 100mA at 0.7V
• Selectable receiver hysteresis