LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
ADI ADCMP605BCPZ-WP product image
  • ADCMP605BCPZ-WP thumbnail 1
  • ADCMP605BCPZ-WP thumbnail 2
  • ADCMP605BCPZ-WP thumbnail 3
  • Pinout
  • Footprint
Images for reference only

ADI ADCMP605BCPZ-WP

Manufacturer
MPN
ADCMP605BCPZ-WP
LCSC Part #
C3658670
Packaging
LFCSP-12(3x3)
Customer #
Key Attributes
1 3mA 5mV Rail-to-rail input LFCSP-12(3x3) Comparators RoHS
Datasheetpdf iconADI ADCMP605BCPZ-WP
RoHS Compliance1 documents available
Out of Stock
Notify Me
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
QtyUnit Price(Reference Only)Total Amount
1+$ 7.993$ 7.99
10+$ 6.4583$ 64.58
30+$ 5.8243$ 174.73
100+$ 5.2922$ 529.22
Standard Packaging50/Full Tray
Better price for more quantity?
$

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Linear/Comparators
ManufacturerADI
PackagingLFCSP-12(3x3)
FeaturesEnable/shutdown function;Latch function;Built-in hysteresis
Ib - Input Bias Current2uA
Output Type-
Propagation Delay(tpd)1.6ns
Number of Channels1
Common Mode Rejection Ratio(CMRR)-
Input Hysteresis Voltage (Vhys)-
Quiescent Current(Iq)3mA
Vos - Input Offset Voltage5mV
Output ModeLVDS
Rail to RailRail-to-rail input
Operating Temperature-40℃~+125℃

Introduction

AI Translation

The ADCMP604/ADCMP605 are very fast comparators fabricated on the proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from V_EE - 0.5 V to V_CCI + 0.2 V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs. The devices offer 1.5 ns propagation delays with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps. A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a -0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a -0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP605, support a wide input signal range with greatly reduced power consumption. The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option. The ADCMP604 is available in a 6-lead SC70 package, and the ADCMP605 is available in a 12-lead LFCSP.

Features

AI Translation
  • Fully specified rail to rail at V_CCl = 2.5 V to 5.5 V
  • Input common-mode voltage from −0.2 V to V_CCI + 0.2 V
  • Low glitch LVDS-compatible output stage
  • 1.6 ns propagation delay
  • 37 mW at 2.5 V
  • Shutdown pin
  • Single-pin control for programmable hysteresis and latch
  • Power supply rejection > 60 dB
  • -40 ℃ to +125 ℃ operation

Applications

AI Translation
  • High speed instrumentation
  • Clock and data signal restoration
  • Logic level shifting or translation
  • Pulse spectroscopy
  • High speed line receivers
  • Threshold detection
  • Peak and zero-crossing detectors
  • High speed trigger circuitry
  • Pulse-width modulators
  • Current-/voltage-controlled oscillators
  • Automatic test equipment (ATE)