TI DS90C383BMT/NOPB
| Manufacturer | |
| MPN | DS90C383BMT/NOPB |
| LCSC Part # | C3244985 |
| Packaging | TSSOP-56 |
| Customer # | |
| Key Attributes | Driver 3V~3.6V 1.8Gbps TSSOP-56 Drivers, Receivers, Transceivers RoHS |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-56 | |
| Type | Driver | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 1.8Gbps | |
| Number of Drivers | - | |
| Features | Low power standby / automatic shutdown on failure | |
| Number of Receivers | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-56 | |
| Type | Driver | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Data Rate | 1.8Gbps | |
| Number of Drivers | - | |
| Features | Low power standby / automatic shutdown on failure | |
| Number of Receivers | - |
Introduction
The DS90C383B transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 65 MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 227 Mbytes/sec. The DS90C383B transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe Receiver (DS90CF386) without any translation logic. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.
Features
- No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered
- Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or -5% down spread
- "Input Clock Detection" feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high
- 18 to 68 MHz shift clock support
- Best-in-Class Setup and Hold Times on TxINPUTs
- Tx power consumption <130 mW (typ) at 65MHz Grayscale
- 40% Less Power Dissipation than BiCMOS Alternatives
- Tx Power-down mode <60μV (typ)
- Supports VGA, SVGA, XGA and Dual Pixel SXGA.
- Narrow bus reduces cable size and cost
- Up to 1.8 Gbps throughput
- Up to 227 Megabytes/sec bandwidth
- 345 mV (typ) swing LVDS devices for low EMI
- PLL requires no external components
- Compatible with TIA/EIA-644 LVDS standard
- Low profile 56-lead TSSOP package
- Improved replacement for: SN75LVDS83, DS90C383A
Applications
- The DS90C383B are backward compatible with the DS90C383/DS90CF383, DS90C383A/DS90CF383A and are a pin-for-pin replacement.
- This device may also be used as a replacement for the DS90CF583 (5V, 65MHz) and DS90CF581 (5V, 40MHz) FPD-Link Transmitters with certain considerations/modifications
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 6.975 | $ 6.98 |
| 10+ | $ 6.8125 | $ 68.13 |
| 30+ | $ 6.7026 | $ 201.08 |
| 100+ | $ 6.5943 | $ 659.43 |
Standard Packaging34/Full Tube | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-56 | |
| Type | Driver | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 1.8Gbps | |
| Number of Drivers | - | |
| Features | Low power standby / automatic shutdown on failure | |
| Number of Receivers | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-56 | |
| Type | Driver | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Data Rate | 1.8Gbps | |
| Number of Drivers | - | |
| Features | Low power standby / automatic shutdown on failure | |
| Number of Receivers | - |
Introduction
The DS90C383B transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 65 MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 227 Mbytes/sec. The DS90C383B transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe Receiver (DS90CF386) without any translation logic. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.
Features
- No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered
- Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or -5% down spread
- "Input Clock Detection" feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high
- 18 to 68 MHz shift clock support
- Best-in-Class Setup and Hold Times on TxINPUTs
- Tx power consumption <130 mW (typ) at 65MHz Grayscale
- 40% Less Power Dissipation than BiCMOS Alternatives
- Tx Power-down mode <60μV (typ)
- Supports VGA, SVGA, XGA and Dual Pixel SXGA.
- Narrow bus reduces cable size and cost
- Up to 1.8 Gbps throughput
- Up to 227 Megabytes/sec bandwidth
- 345 mV (typ) swing LVDS devices for low EMI
- PLL requires no external components
- Compatible with TIA/EIA-644 LVDS standard
- Low profile 56-lead TSSOP package
- Improved replacement for: SN75LVDS83, DS90C383A
Applications
- The DS90C383B are backward compatible with the DS90C383/DS90CF383, DS90C383A/DS90CF383A and are a pin-for-pin replacement.
- This device may also be used as a replacement for the DS90CF583 (5V, 65MHz) and DS90CF581 (5V, 40MHz) FPD-Link Transmitters with certain considerations/modifications
C3244985 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

