RENESAS R5F11MMFAFB#50

Integrated LCD controller/driver, 12-bit resolution A/D Converter, 12-bit resolution D/A Converter, Operational amplifier, Internal reference voltage for A/D and D/A converters. True Low Power Platform (as low as 70.8 μA/MHz, and 0.68 μA in Halt mode(RTC2+LVD)), 1.8 to 3.6 V operation, 48 to 128 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications.

• Ultra-low power consumption technology
• VDD = single power supply voltage of 1.8 to 3.6 V
• HALT mode
• STOP mode
• SNOOZE mode
• RL78 CPU core: CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock) to ultra-low speed (30.5 μs: @ Ø 32.768 kHz operation with subsystem clock)
• Multiply/divide and multiply/accumulate instructions are supported
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8)×4 banks
• On-chip RAM: 5.5 KB
• Code flash memory: 48 to 128 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield window function)
• Data flash memory: 8 KB
• Background operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: VDD = 1.8 to 3.6 V
• High-speed on-chip oscillator: Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz
• High accuracy: ±1.0% (VDD = 1.8 to 3.6 V, TA = -20 to +85℃)
• Operating ambient temperature: TA = -40 to +85℃ (A: Consumer applications)
• Power management and reset function: On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and reset from 10 levels)
• Data transfer controller (DTC): Transfer modes: Normal transfer mode, repeat transfer mode, block transfer mode
• Activation sources: Activated by interrupt sources (30 sources)
• Chain transfer function
• Event link controller (ELC): Event signals of 22 types can be linked to the specified peripheral function
• Serial interfaces: Simplified SPI (CSINote 1): 4 channels
• UART: 4 channels
• I2C/simplified I2C: 5 channels
• Timers: 16-bit timer: 8 channels
• 8-bit timer: 2 channels
• 12-bit interval timer: 1 channel
• Real-time clock 2: 1 channel (calendar for 99 years, alarm function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)
• LCD controller/driver: Internal voltage boosting method, capacitor split method, and external resistance division method are switchable
• Segment signal output: 32 (28) to 45 (41)
• Common signal output: 4 (8)
• A/D converter: 12-bit resolution A/D converter (1.8 V ≤ AVDD ≤ VDD ≤ 3.6 V)
• Analog input: 10 to 15 channels (including a dedicated one for internal 1/2 AVDD)
• Internal reference voltage (TYP. 1.45 V) and temperature sensor
• D/A converter: 12-bit resolution D/A converter (1.8 V ≤ AVDD ≤ VDD ≤ 3.6 V)
• Analog output: 2 channels
• Output voltage: 0.35 V to AVDD – 0.47 V
• Voltage reference: The output voltage can be selected from among 1.5 V (typ.), 1.8 V (typ.), 2.048 V (typ.), and 2.5 V (typ.)
• Can be used as the internal reference voltage for A/D and D/A converters
• Comparator: 1 channel
• Operating modes: Comparator high-speed mode, comparator low-speed mode, window mode
• The external reference voltage or internal reference voltage can be selected as the reference voltage
• Operational amplifier: General-purpose operational amplifier: 1 channel
• Rail-to-rail operational amplifier with analog MUX: 2 channels
• I/O ports: I/O ports: 59 to 79 (N-ch open drain I/O [withstand voltage of 6 V]: 2)
• Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
• On-chip BCD (binary-coded decimal) correction circuit