Infineon/CYPRESS CY7C419-40VC

CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, and CY7C432/3 are first-in first-out (FIFO) memories available in 600-mil wide and 300-mil wide packages. They are organized as 256, 512, 1024, 2048, and 4096 words, respectively, with a width of 9 bits. Each FIFO memory is organized so that data is read in the order it was written. Full and empty flags are provided to prevent overflow and underflow. Three additional pins are provided to facilitate unlimited expansion in width, depth, or both. The depth expansion technique routes control signals in parallel from one device to the next, eliminating the serial accumulation of propagation delays so that throughput is not reduced. Data is routed in a similar manner. Read and write operations can be asynchronous, with each operation at rates up to 50.0MHz. A write operation occurs when the write signal (W̄) is LOW, and a read operation occurs when the read signal (R̄) is LOW. When R̄ is HIGH, the nine data outputs enter a high-impedance state. The half-full (HF) output flag is active in standalone and width expansion configurations. In the depth expansion configuration, this pin provides expansion output (XO) information to inform the next FIFO that it will be activated. In standalone and width expansion configurations, asserting the retransmit (RT) input LOW causes the FIFO to retransmit data. During retransmission, both the read enable (R̄) and write enable (W̄) must be HIGH, after which data is accessed using R̄. The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425, CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated using advanced 0.65-micron P-well CMOS technology. Input ESD protection exceeds 2000V, and latch-up is prevented through careful layout and guard rings.

• 256×9, 512×9, 1024×9, 2048×9, and 4096×9 FIFO buffer memory
• Dual-port RAM cell
• Asynchronous read/write
• High-speed 50.0MHz read/write, independent of depth/width
• Low operating power consumption
• I_CC1 = 35mA
• Half-full flag in independent mode
• Empty and full flags
• Retransmit function in independent mode
• Expandable width and depth
• Parallel cascading to minimize fall-through delay
• 5V ± 10% supply
• 300-mil DIP package
• 7×7 TQFP package
• 300-mil SOJ package
• TTL compatible
• Three-state outputs
• Pin compatible and functionally equivalent to IDT7200, IDT7201, IDT7202, IDT7203, and IDT7204