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Infineon/CYPRESS S25FL256SAGMFIR00 product image
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Infineon/CYPRESS S25FL256SAGMFIR00RoHS

Manufacturer
Infineon/CYPRESS
MPN
S25FL256SAGMFIR00
LCSC Part #
C2952068
Packaging
SOIC-16-300mil
Customer #
Key Attributes
256Mbit 2.7V~3.6V 133MHz SPI SOIC-16-300mil Memory RoHS
Datasheetpdf iconInfineon/CYPRESS S25FL256SAGMFIR00
In-Stock: 5
5 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
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QtyUnit PriceTotal Amount
1+$ 9.153$ 9.15
10+$ 8.9318$ 89.32
30+$ 8.7838$ 263.51
100+$ 8.6358$ 863.58
Standard Packaging240/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerInfineon/CYPRESS
PackagingSOIC-16-300mil
FeaturesWrite enable latch;Power-on reset;Hardware write protection;Software write protection;ECC error correction
Memory Size256Mbit
Voltage - Supply2.7V~3.6V
Program / Erase Cycles100,000 cycles
Clock Frequency133MHz
Data Retention - TDR (Year)20 Years
InterfaceSPI
Standby Supply Current70uA
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Features

AI Translation
  • CMOS 3.0 V core with versatile I/O
  • SPI with multi-I/O
    • SPI clock polarity and phase modes 0 and 3
    • DDR option
    • Extended addressing: 24- or 32-bit address options
    • Serial command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P SPI families
    • Multi I/O command set and footprint compatible with S25FL-P SPI family
    • READ commands
      • Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad DDR
      • AutoBoot - Power up or reset and execute a Normal or Quad read command automatically at a preselected address
      • Common flash interface (CFI) data for configuration information
    • Programming (1.5 MBps)
      • 256- or 512-byte page programming buffer options
      • Quad-input page programming (QPP) for slow clock systems
      • Automatic ECC-internal hardware error correction code generation with single bit error correction
    • Erase (0.5 to 0.65 MBps)
      • Hybrid sector size option - Physical set of thirty two 4-KB sectors at top or bottom of address space with all remaining sectors of 64 KB, for compatibility with prior generation S25FL devices.
      • Uniform sector option - always erase 256-KB blocks for software compatibility with higher density and future devices.
    • Cycling endurance - 100,000 program-erase cycles, minimum
    • Data retention - 20 year data retention, minimum
    • Security features
      • OTP array of 1024 bytes
      • Block protection
        • Status Register bits to control protection against program or erase of a contiguous range of sectors.
        • Hardware and software control options
      • Advanced sector protection (ASP)
        • Individual sector protection controlled by boot code or password
    • 65-nm MIRRORBIT technology with Eclipse architecture
    • Core supply voltage: 2.7 V to 3.6 V
    • I/O supply voltage: 1.65 V to 3.6 V
    • SO16 and FBGA packages
    • Temperature range/grade:
      • Industrial (-40°C to +85°C)
      • Industrial Plus (-40°C to +105°C)
      • Automotive AEC-Q100 grade 3 (-40°C to +85°C)
      • Automotive AEC-Q100 grade 2 (-40°C to +105°C)
      • Automotive AEC-Q100 grade 1 (-40°C to +125°C)
    • Packages (all Pb-free)
      • 16-lead SOIC (300 mil)
      • WSON 6×8 mm
      • BGA-24 6×8 mm
      • 5×5 ball (FAB024) and 4×6 ball (FAC024) footprint options
      • Known good die (KGD) and known tested die