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Infineon/CYPRESS CY8C4745LQI-S411 product image
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Infineon/CYPRESS CY8C4745LQI-S411

Manufacturer
Infineon/CYPRESS
MPN
CY8C4745LQI-S411
LCSC Part #
C2948591
Packaging
UFQFN-24-EP
Customer #
Key Attributes
ARM Cortex-M0+ 32 Bit 48MHz 19 UFQFN-24-EP Microcontrollers
Datasheetpdf iconInfineon/CYPRESS CY8C4745LQI-S411
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QtyUnit Price(Reference Only)Total Amount
1+$ 0.3314$ 0.33
200+$ 0.1283$ 25.66
500+$ 0.1238$ 61.90
1,000+$ 0.1215$ 121.50
Standard Packaging4900/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerInfineon/CYPRESS
PackagingUFQFN-24-EP
Operating Temperature-40℃~+85℃
Program Memory TypeFLASH
Voltage - Supply1.71V~5.5V
EEPROM-
Program Storage Size32KB
CPU CoreARM Cortex-M0+
Core Size32 Bit
CPU Maximum Speed48MHz
Oscillator TypeBuilt-in
Number of I/O19
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Introduction

AI Translation

PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4700S product family, based on this platform, is the first microcontroller with inductive sensing and capacitive sensing technology in a single chip. The inductive sensing (MagSense) technology enables sensing of metal objects and industry's leading capacitive sensing (CapSense) technology enables sensing of non-metallic objects.

Features

AI Translation
  • 48-MHz Arm Cortex-M0+ CPU
  • Up to 32 KB of flash with Read Accelerator
  • Up to 4 KB of SRAM
  • Cypress MagSense provides superior noise immunity
  • Reliably detects metal deflection under 190 nm
  • MagSense software component automatically calibrates to compensate for the manufacturing variations
  • Up to 16 sensors
  • Cypress CapSense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance
  • Cypress-supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense)
  • One single-slope 10-bit ADC function
  • Two current DACs (IDACs)
  • Two low-power comparators that operate in Deep Sleep low-power mode
  • Two SmartIO ports allowing Boolean operations to be performed on port inputs and outputs
  • Deep Sleep mode with operational analog and 2.5 μA digital system current
  • Two independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI, or UART functionality
  • LCD segment drive capability on GPIOs
  • Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks
  • Center-aligned, Edge, and Pseudo-random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
  • 48-pin TQFP, 24-pin QFN, and 25-ball WLCSP packages
  • Any GPIO pin can be capacitive sensing, analog, or digital; up to 16 pins can be used for inductive sensing.
  • Drive modes, strengths, and slew rates are programmable
  • Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
  • Applications Programming Interface (API) component for all fixed-function and programmable peripherals
  • After schematic entry, development can be done with Arm-based industry-standard development tools