Infineon/CYPRESS MB90387SPMT-GS-138

MB90385 series devices are general-purpose high-performance 16-bit micro controllers designed for process control of consumer products, which require high-speed real-time processing. The devices of this series have the built-in full-CAN interface. The system, inheriting the architecture of F²MC family, employs additional instruction ready for high-level languages, expanded addressing mode, enhanced multiply-divide instructions, and enriched bit-processing instructions. Furthermore, employment of 32-bit accumulator achieves processing of long-word data (32 bits). The peripheral resources of MB90385 series include the following: 8/10-bit A/D converter, UART (SCI), 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture 0, 1, 2, 3 (ICU)), and CAN controller.

• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz)
• Operation by sub-clock (8.192 kHz) is allowed. (MB90387, MB90F387)
• Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multiplied PLL clock)
• 24-bit internal addressing
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• Enhanced multiply-divide instructions and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
• 4-byte instruction queue
• Powerful Interrupt Function with 8 Levels and 34 Factors
• Automatic Data Transfer Function Independent of CPU
• Expanded intelligent I/O service function (EI2 OS): Maximum of 16 channels
• Sleep mode (a mode that halts CPU operating clock)
• Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and watch timer only)
• Watch mode (a mode that operates sub clock and watch timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode
• CMOS technology
• General-purpose input/output port (CMOS output): MB90387, MB90F387: 34 ports (including 4 high-current output ports) MB90387S, MB90F387S: 36 ports (including 4 high-current output ports)
• Time-base timer, watch timer, watchdog timer: 1 channel
• 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels
• 16-bit reload timer: 2 channels
• 16-bit input/output timer
  • 16-bit free run timer: 1 channel
  • 16-bit input capture: (ICU): 4 channels Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin input
• Compliant with Ver2.0A and Ver2.0B CAN specifications
• 8 built-in message buffers
• Transmission rate of 10 kbps to 1 Mbps (by 16 MHz machine clock)
• CAN wake-up
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
• Module for activation of expanded intelligent I/O service (EI2OS), and generation of external interrupt
• Generates interrupt request for task switching
• Resolution is selectable between 8-bit and 10-bit
• Activation by external trigger input is allowed
• Conversion time: 6.125 μs (at 16 MHz machine clock, including sampling time)
• Address matching detection for 2 address pointers