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SAMSUNG K4A8G165WB-BIRC product image
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SAMSUNG K4A8G165WB-BIRCRoHS

Manufacturer
MPN
K4A8G165WB-BIRC
LCSC Part #
C2920128
Packaging
FBGA-96
Customer #
Key Attributes
8Gbit 1.2V DDR4 FBGA-96 Memory RoHS
Datasheetpdf iconSAMSUNG K4A8G165WB-BIRC
In-Stock: 2
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QtyUnit PriceTotal Amount
1+$ 42.8457$ 42.85
30+$ 40.7211$ 1221.63
Standard Packaging2000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerSAMSUNG
PackagingFBGA-96
Operating Temperature-40℃~+95℃
Memory Size8Gbit
Voltage - Supply1.2V
InterfaceDDR4

Features

AI Translation
  • JEDEC-compliant 1.2V operating voltage (range 1.14V~1.26V), VDDQ also at 1.2V (range 1.14V~1.26V)
  • VPP activation voltage: 2.5V (range 2.375V~2.75V)
  • Multiple clock frequencies and data transfer rates: 800MHz / 1600Mb/s/pin, 933MHz / 1866Mb/s/pin, 1067MHz / 2133Mb/s/pin, 1200MHz / 2400Mb/s/pin, 1333MHz / 2666Mb/s/pin
  • 8-bank (2 bank group) architecture
  • Programmable CAS Latency (CL): 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20
  • Programmable CAS Write Latency (CWL): DDR4-1600: 9, 11; DDR4-1866: 10, 12; DDR4-2133: 11, 14; DDR4-2400: 12, 16; DDR4-2666: 14, 18
  • 8-bit prefetch
  • Burst Length: BL8 and BC4 (seamless read/write not allowed when tCCD=4; dynamically selectable via A12 or Mode Register)
  • Differential bidirectional data strobe
  • Internal (self) calibration via ZQ pin (reference resistor RZQ: 240Ω ± 1%)
  • On-Die Termination (ODT) via ODT pin
  • Average refresh interval: 7.8μs at TCASE ≤ 85°C; 3.9μs at 85°C < TCASE ≤ 95°C
  • Industrial temperature range: -40°C ~ 95°C
  • Refresh interval tREFI: 7.8μs at -40°C ≤ TCASE ≤ 85°C; 3.9μs at 85°C < TCASE ≤ 95°C
  • Asynchronous reset support
  • Package: 96-ball FBGA, x16 width
  • All lead-free products RoHS compliant
  • All products halogen-free
  • CRC for read/write data integrity
  • Command address parity support
  • Data Bus Inversion (DBI) support
  • Geardown mode support
  • Pseudo Open Drain (POD) interface for data I/O
  • Internal VREF for data input
  • External VPP for DRAM activation power
  • PPR and sPPR support