MXIC MX25V20066M1I02

The MX25V20066 is a 2Mb serial NOR Flash memory, internally configured as 1,048,576 x 2. The device features a serial peripheral interface and software protocol, supporting simple 3-wire bus operation in single I/O mode. The three bus signals are clock input, serial data input, and serial data output. Serial access to the device is enabled via the CS input. In 2-wire I/O read mode, the SI and SO pins become SIO0 and SIO1 pins for address/dummy input and data output. The Flash supports continuous read operations across the entire chip. Upon issuing a program/erase command, an automatic program/erase algorithm is executed to program/erase and verify the specified page or sector/block location. Program commands can be executed by byte, page, or word. Erase commands can be executed by 4KB sector, 32KB block, 64KB block, or full chip. A status register is included for user interface convenience to indicate device status. A status read command can be issued to detect the completion of a program or erase operation via the WIP bit.

• Supports SPI, Mode 0 and Mode 3.
• Memory organization: 2,097,152 x 1-bit or 1,048,576 x 2-bit.
• Multiple 4K-byte sectors, 32K-byte blocks, or 64K-byte blocks, each individually erasable.
• Single power supply, operating voltage 2.3V to 3.6V, for read, erase, and program operations.
• Latch-up protection.
• High performance: fast read support, 80MHz in single I/O mode, equivalent 160MHz in dual I/O mode; fast program and erase times.
• Low power consumption.
• Typical erase/program endurance: 100,000 cycles; data retention: 20 years.
• Software features: 1-byte instruction code; advanced security features including block lock protection with status-bit-defined protected area size; auto-erase and auto-program algorithms for automatic erase/verify of selected sectors or blocks and automatic program/verify of selected pages.
• Status register function.
• Electronic identification: JEDEC manufacturer ID and device ID; device ID read via RES command; manufacturer ID and device ID read via REMS command.
• Serial Flash Discoverable Parameters (SFDP) mode support.
• Hardware features: clock input; SI/SIO0 pin for serial data input or I/O in dual I/O read mode; SO/SIO1 pin for serial data output or I/O in dual I/O read mode; hardware write-protect pin.
• Package options: 8-pin SOP, 8-pin SOP, 8-pad USON.
• RoHS compliant and halogen-free.