LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
Nexperia 74AHCT574PW,118 product image
  • 74AHCT574PW,118 thumbnail 1
  • 74AHCT574PW,118 thumbnail 2
  • 74AHCT574PW,118 thumbnail 3
  • Pinout
  • Footprint
Images for reference only

Nexperia 74AHCT574PW,118RoHS

Manufacturer
MPN
74AHCT574PW,118
LCSC Part #
C282328
Packaging
TSSOP-20
Customer #
Key Attributes
Octal D-type flip-flop; positive edge-trigger; 3-state
Datasheetpdf iconNexperia 74AHCT574PW,118
Alternative Parts1
In-Stock: 1,505
1,505 In stock, ships now
Minimum: 5Multiple: 5Sales Unit: Piece
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.2773$ 1.39
50+$ 0.2444$ 12.22
150+$ 0.2302$ 34.53
500+$ 0.2126$ 106.30
2,500+$ 0.2048$ 512.00
5,000+$ 0.2$ 1000.00
Standard Packaging2500/Full Reel
Better price for more quantity?
$

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Flip Flops
ManufacturerNexperia
PackagingTSSOP-20
Voltage - Supply4.5V~5.5V
Number of Bits per Element8
Output TypeTri-State
Operating Temperature-40℃~+125℃
Series74AHCT Series
Synchronous/Asynchronous-
Number of Elements1
Current - Output High(IOH)8mA
Current - Output Low(IOL)8mA
Setup Time3.5ns
Quiescent Current4uA
Hold Time1.5ns
Propagation Delay10.6ns@5V,50pF
Trigger TypeRising Edge

Introduction

AI Translation

The 74AHC574; 74AHCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.

Features

AI Translation
  • Wide supply voltage range: For 74AHC574: from 2.0 V to 5.5 V; For 74AHCT574: from 4.5 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • Balanced propagation delays
  • All inputs have a Schmitt-trigger action
  • High noise immunity
  • 3-state non-inverting outputs for bus orientated applications
  • CMOS low power dissipation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
  • Input levels: For 74AHC574: CMOS input level; For 74AHCT574: TTL input level
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Alternative Parts

MPNManufacturerPackagingAvailabilityUnit Price
74VHCT574AFTTOSHIBATSSOP-202,190$ 0.2464