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MXIC MX29F800CBTI-70G product image
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MXIC MX29F800CBTI-70GRoHS

Manufacturer
MXIC
MPN
MX29F800CBTI-70G
LCSC Part #
C2803074
Packaging
TSOPI-48
Customer #
Key Attributes
8M-bit single-voltage 5V flash memory
Datasheetpdf iconMXIC MX29F800CBTI-70G
In-Stock: 1
1 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
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QtyUnit PriceTotal Amount
1+$ 6.73$ 6.73
10+$ 6.0365$ 60.37
30+$ 5.6234$ 168.70
96+$ 5.2054$ 499.72
480+$ 5.0126$ 2406.05
960+$ 4.9252$ 4728.19
Standard Packaging96/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerMXIC
PackagingTSOPI-48
Operating Temperature-40℃~+85℃
FeaturesPower-on reset;Hardware write protection
Memory Size8Mbit
Voltage - Supply4.5V~5.5V
Program / Erase Cycles100,000 cycles
Clock Frequency5MHz
Data Retention - TDR (Year)20 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)-
Standby Supply Current1uA
InterfaceParallel
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Features

AI Translation
  • Single Power Supply Operation - 4.5 to 5.5 volt for read, erase, and program operations
  • 1,048,576 x 8 / 524,288 x 16 switchable
  • Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector
  • Sector Structure - 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15
  • Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotected allows code changes in previously locked sectors
  • Latch-up protected to 100 mA from -1V to Vcc + 1V
  • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash
  • High Performance - Access time: 70 ns - Byte/Word program time: 9 μs/11 μs (typical) - Erase time: 0.7 s/sector, 8 s/chip (typical)
  • Low Power Consumption - Low active read current: 40 mA (maximum) at 5 MHz - Low standby current: 1 μA (typical)
  • Minimum 100,000 erase/program cycle
  • 20 years data retention
  • Erase Suspend/ Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased
  • Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion
  • Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion
  • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode
  • 44-Pin SOP
  • 48-Pin TSOP
  • 48-Ball LFBGA (6x8 mm)
  • All devices are RoHS Compliant
  • All non RoHS Compliant devices are not recommeded for new design in