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TI SN74AUP1T86DCKRRoHS

Manufacturer
TI
MPN
SN74AUP1T86DCKR
LCSC Part #
C2682007
Packaging
SC-70-5
Customer #
Key Attributes
Low-power 1.8/2.5/3.3-V input, 3.3-V CMOS output 2-input XOR gate
Datasheetpdf iconTI SN74AUP1T86DCKR
In-Stock: 530
530 In stock, ships now
Minimum: 5Multiple: 5Sales Unit: Piece
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QtyUnit PriceTotal Amount
5+$ 0.1392$ 0.70
50+$ 0.1113$ 5.57
150+$ 0.0974$ 14.61
500+$ 0.087$ 43.50
3,000+$ 0.0786$ 235.80
6,000+$ 0.0744$ 446.40
Standard Packaging3000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingSC-70-5
output type-
Input TypeSchmitt trigger
Logic Family74AUP Series
Voltage - Supply2.3V~3.6V
Output Logic Level - Low310mV;440mV
Propagation Delay4.4ns@3.3V,30pF
FeaturesLocal shutdown mode
Input Logic Level - High1.1V~1.19V
Operating Temperature-40℃~+85℃
Input Logic Level - Low350mV~500mV
Output Logic Level - High2.6V;2.72V
Quiescent Current(Iq)500nA
Current - Output High(IOH)4mA
Number of Channels1;2
Current - Output Low(IOL)4mA
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Introduction

AI Translation

The SN74AUP1T86 performs the Boolean function Y = A⊕B or Y = A(overline)B + A B(overline) with designation for logic-level translation applications with output referenced to supply VCC. AUP technology is the lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains excellent signal integrity. The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors. Schmitt-trigger inputs (ΔVₜ = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T86 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

Features

AI Translation
  • Single-Supply Voltage Translator
  • 1.8 V to 3.3 V (at VCC = 3.3 V)
  • 2.5 V to 3.3 V (at VCC = 3.3 V)
  • 1.8 V to 2.5 V (at VCC = 2.5 V)
  • 3.3 V to 2.5 V (at VCC = 2.5 V)
  • ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 1000-V Charged-Device Model (C101)
  • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
  • Ioff Supports Partial Power Down (VCC = 0 V)
  • Very Low Static Power Consumption: 0.1 μA
  • Very Low Dynamic Power Consumption: 0.9 μA
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • Pb-Free Packages Available: SC-70 (DCK) 2x2.1x0.65 mm (Height 1.1 mm)