TI SN74CB3Q16811DGGR

The SN74CB3Q16811 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r_on). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q16811 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. The SN74CB3Q16811 is organized as two 12-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to bias voltage (BIASV) through the equivalent of a 10-kΩ resistor when OE is high or if the device is powered down (ΔVCC = 0ΔV). This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• Member of the Texas Instruments Widebus Family
• SN74CB3Q Bus Switches Are Equivalent to IDTQS3VH Bus Switches
• 5-V Tolerant I/Os With Device Powered Up or Powered Down
• Low and Flat ON-State Resistance (r_on) Characteristics Over Operating Range (r_on = 5 Ω Typ)
• Rail-to-Rail Switching on Data I/O Ports
• 0- to 5-V Switching With 3.3-V VCC
• 0- to 3.3-V Switching With 2.5-V VCC
• B-Port Outputs Are Precharged by Bias Voltage (BIASV) to Minimize Signal Distortion During Live Insertion and Hot Plugging
• Supports PCI Hot Plug
• Bidirectional Data Flow With Near-Zero Propagation Delay
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 4 pF Typ)
• Fast Switching Frequency (f_ON = 20 MHz Max)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (I_CC = 0.75 mA Typ)
• V_CC Operating Range From 2.3 V to 3.6 V
• Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
• Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22
• 2000-V Human-Body Model (A114-B, Class II)
• 1000-V Charged-Device Model (C101)
• Supports Both Digital and Analog Applications: PCI Hot Plug, Hot Docking, Memory Interleaving, Bus Isolation, and Low-Distortion Signal Gating

• PCI Hot Plug
• Hot Docking
• Memory Interleaving
• Bus Isolation
• Low-Distortion Signal Gating