micron MT45W1MW16PAFA-85 WT
| Manufacturer | |
| MPN | MT45W1MW16PAFA-85 WT |
| LCSC Part # | C20560969 |
| Packaging | 48-VFBGA (6x8) |
| Customer # | |
| Key Attributes | 48-VFBGA (6x8) Memory |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 48-VFBGA (6x8) | |
| Features | Temperature compensated refresh;Built-in temperature sensor;Partial array refresh;Built-in voltage sensor |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron |
| Type | Description | |
|---|---|---|
| Packaging | 48-VFBGA (6x8) | |
| Features | Temperature compensated refresh;Built-in temperature sensor;Partial array refresh;Built-in voltage sensor |
Introduction
CellularRAM products are high-speed, CMOS PSRAM memories developed for low-power, portable applications. The MT45W2MW16PA is a 32Mb DRAM core device organized as 2 Meg x 16 bits, and the MT45W1MW16PA is a 16Mb DRAM core device organized as 1 Meg x 16 bits. These devices include the industry-standard, asynchronous memory interface found on other low-power SRAM or Pseudo SRAM offerings. A user-accessible configuration register (CR) defines how the CellularRAM device performs on-chip refresh and whether page mode read accesses are permitted. This register is automatically loaded with a default setting during power-up and can be updated at any time during normal operation.
Features
- Asynchronous and page mode interface
- Random access time: 70ns, 85ns
- VCC, VCCQ voltages 1.70V–1.95V VCC 1.70V–3.30V VCCQ
- Page mode read access Sixteen-word page size Interpage read access: 70ns, 85ns Intrapage read access: 20ns, 25ns
- Low power consumption Asynchronous READ: <20mA Intrapage READ: <15mA Standby: 110μA (32Mb – standard), 80μA (16Mb) 90μA (32Mb – low-power option) Deep power-down: <10μA (TYP @ Ø 25℃)
- Low-power features Temperature compensated refresh (TCR) On-chip temperature sensor Partial array refresh (PAR) Deep power-down (DPD) mode
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 9.2968 | $ 9.30 |
| 200+ | $ 3.7106 | $ 742.12 |
| 500+ | $ 3.586 | $ 1793.00 |
| 1,000+ | $ 3.5253 | $ 3525.30 |
Standard Packaging2000/Full Bag | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 48-VFBGA (6x8) | |
| Features | Temperature compensated refresh;Built-in temperature sensor;Partial array refresh;Built-in voltage sensor |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron |
| Type | Description | |
|---|---|---|
| Packaging | 48-VFBGA (6x8) | |
| Features | Temperature compensated refresh;Built-in temperature sensor;Partial array refresh;Built-in voltage sensor |
Introduction
CellularRAM products are high-speed, CMOS PSRAM memories developed for low-power, portable applications. The MT45W2MW16PA is a 32Mb DRAM core device organized as 2 Meg x 16 bits, and the MT45W1MW16PA is a 16Mb DRAM core device organized as 1 Meg x 16 bits. These devices include the industry-standard, asynchronous memory interface found on other low-power SRAM or Pseudo SRAM offerings. A user-accessible configuration register (CR) defines how the CellularRAM device performs on-chip refresh and whether page mode read accesses are permitted. This register is automatically loaded with a default setting during power-up and can be updated at any time during normal operation.
Features
- Asynchronous and page mode interface
- Random access time: 70ns, 85ns
- VCC, VCCQ voltages 1.70V–1.95V VCC 1.70V–3.30V VCCQ
- Page mode read access Sixteen-word page size Interpage read access: 70ns, 85ns Intrapage read access: 20ns, 25ns
- Low power consumption Asynchronous READ: <20mA Intrapage READ: <15mA Standby: 110μA (32Mb – standard), 80μA (16Mb) 90μA (32Mb – low-power option) Deep power-down: <10μA (TYP @ Ø 25℃)
- Low-power features Temperature compensated refresh (TCR) On-chip temperature sensor Partial array refresh (PAR) Deep power-down (DPD) mode
C20560969 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | - |
| CNHTS | 8536901100 |
| USHTS | 8536908585 |
| TARIC | 8536901000 |
| CAHTS | 8536900090 |
| BRHTS | 85369010 |
| INHTS | 85369010 |
| MXHTS | 8536.90.11 |
| Type | Details |
|---|---|
| ECCN | - |
| CNHTS | 8536901100 |
| USHTS | 8536908585 |
| TARIC | 8536901000 |
| Type | Details |
|---|---|
| CAHTS | 8536900090 |
| BRHTS | 85369010 |
| INHTS | 85369010 |
| MXHTS | 8536.90.11 |

