RENESAS RC19016A100GN1#BB0
| Manufacturer | |
| MPN | RC19016A100GN1#BB0 |
| LCSC Part # | C20353880 |
| Packaging | VFQFPN-64(9x9) |
| Customer # | |
| Key Attributes | VFQFPN-64(9x9) Application Specific Clock/Timing RoHS |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-64(9x9) | |
| Features | Alarm function |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS |
| Type | Description | |
|---|---|---|
| Packaging | VFQFPN-64(9x9) | |
| Features | Alarm function |
Introduction
The RC190xx (RC19024, RC19020, RC19020A072, RC19016, RC19013, RC19008, RC19004, and RC19002) ultra-high performance fanout buffers support PCIe Gen5 and Gen6. They provide a LossOf-Signal (LOS) output for system monitoring and redundancy. The devices also incorporate Power Down Tolerant (PDT) and Flexible Startup Sequencing (FSS) features, easing system design. They can drive both source-terminated and doubleterminated loads, operating up to 400MHz. The family offers 2, 4, 8, 13, 16, 20, and 24 LowPower (LP) HCSL output pairs in 3x3 mm to 10x10 mm packages. The RC190xx devices offer higher output counts in smaller packages compared to earlier buffer families. The buffers support both Common Clock (CC) and Independent Reference (IR) PCIe clock architectures.
Features
- PCIe Gen5 additive phase jitter: 6fs RMS
- PCIe Gen6 additive phase jitter: 4fs RMS
- DB2000Q additive phase jitter: 10fs RMS
- 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz
- Power Down Tolerant (PDT) inputs
- Flexible Startup Sequencing (FSS)
- Automatic Clock Parking (ACP) upon loss of CLKIN
- Spread-spectrum tolerant
- CLKIN accepts HCSL or LVDS signal levels
- -40 to +105°C, 3.3V±10% operation
- All devices except RC19002:
- Selectable output slew rate via pin/SMBus
- 4-wire Side-Band Interface supports high-speed serial output enable and device daisy-chaining
- 9 SMBus addresses plus write protection
- 85Ω or 100Ω (A100 suffix) output impedance
- Pin-selectable slew rate
- RC19002: Pin-selectable output impedance
Applications
- Cloud/High-performance computing
- nVME storage
- Networking
- Accelerators
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 7.4151 | $ 7.42 |
| 10+ | $ 6.376 | $ 63.76 |
| 30+ | $ 5.7435 | $ 172.31 |
| 100+ | $ 5.2134 | $ 521.34 |
Standard Packaging207/Full Tray | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-64(9x9) | |
| Features | Alarm function |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS |
| Type | Description | |
|---|---|---|
| Packaging | VFQFPN-64(9x9) | |
| Features | Alarm function |
Introduction
The RC190xx (RC19024, RC19020, RC19020A072, RC19016, RC19013, RC19008, RC19004, and RC19002) ultra-high performance fanout buffers support PCIe Gen5 and Gen6. They provide a LossOf-Signal (LOS) output for system monitoring and redundancy. The devices also incorporate Power Down Tolerant (PDT) and Flexible Startup Sequencing (FSS) features, easing system design. They can drive both source-terminated and doubleterminated loads, operating up to 400MHz. The family offers 2, 4, 8, 13, 16, 20, and 24 LowPower (LP) HCSL output pairs in 3x3 mm to 10x10 mm packages. The RC190xx devices offer higher output counts in smaller packages compared to earlier buffer families. The buffers support both Common Clock (CC) and Independent Reference (IR) PCIe clock architectures.
Features
- PCIe Gen5 additive phase jitter: 6fs RMS
- PCIe Gen6 additive phase jitter: 4fs RMS
- DB2000Q additive phase jitter: 10fs RMS
- 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz
- Power Down Tolerant (PDT) inputs
- Flexible Startup Sequencing (FSS)
- Automatic Clock Parking (ACP) upon loss of CLKIN
- Spread-spectrum tolerant
- CLKIN accepts HCSL or LVDS signal levels
- -40 to +105°C, 3.3V±10% operation
- All devices except RC19002:
- Selectable output slew rate via pin/SMBus
- 4-wire Side-Band Interface supports high-speed serial output enable and device daisy-chaining
- 9 SMBus addresses plus write protection
- 85Ω or 100Ω (A100 suffix) output impedance
- Pin-selectable slew rate
- RC19002: Pin-selectable output impedance
Applications
- Cloud/High-performance computing
- nVME storage
- Networking
- Accelerators
C20353880 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



