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Nexperia 74LVC1G99GT/S500,1 product image
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Nexperia 74LVC1G99GT/S500,1RoHS

Manufacturer
MPN
74LVC1G99GT/S500,1
LCSC Part #
C20235012
Packaging
XSON-8(1x2)
Customer #
Key Attributes
Schmitt trigger 1.65V~5.5V 32mA 200uA 24mA XSON-8(1x2) Gates and Inverters - Multi-Function, Configurable RoHS
Datasheetpdf iconNexperia 74LVC1G99GT/S500,1
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200+$ 0.2127$ 42.54
500+$ 0.2066$ 103.30
1,000+$ 0.2021$ 202.10
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable
ManufacturerNexperia
PackagingXSON-8(1x2)
output typeTri-State
Logic Family74LVC
Input typeSchmitt trigger
Propagation Delay4.5ns@3.3V,50pF;3.8ns@5V,50pF
Voltage - Supply1.65V~5.5V
Operating Temperature-40℃~+125℃
Output Logic Level - Low800mV;550mV;450mV
Input Logic Level - High-
Input Logic Level - Low-
Current - Output Low(IOL)32mA
Output Logic Level - High2V;3.4V;3.8V
Quiescent Current(Iq)200uA
Current - Output High(IOH)24mA
FeaturesControllable output enable;Overvoltage-tolerant input;Local shutdown mode;Rear drive protection
Number of Gates-

Introduction

AI Translation

The 74LVC1G99 provides a low-voltage, ultra-configurable multifunction gate with tri-state outputs. The device can be configured as one of many logic functions, including AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer, and multiplexer. No external components are required for configuration, as all inputs can be connected directly to VCC or GND. The tri-state output is controlled by the output enable input (OE). When OE is HIGH, the output (Y) enters a high-impedance off state. When OE is LOW, the output state is determined by the signals applied to the Schmitt-trigger inputs (A, B, C, and D). The use of Schmitt-trigger inputs allows the device to tolerate slowly changing input signals and convert them into well-defined, bounce-free output signals. By eliminating leakage current paths to VCC and GND, the inputs and disabled outputs are also overvoltage-tolerant, making the device suitable for mixed-voltage applications. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs to prevent destructive backflow current through the device when it is powered down. The 74LVC1G99 is fully specified over a supply voltage range of 1.65V to 5.5V.

Features

AI Translation
  • Wide supply voltage range: 1.65V to 5.5V
  • 5V-tolerant inputs for interfacing with 5V logic
  • High noise immunity
  • JEDEC compliant: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8-B/JESD36 (2.7V to 3.6V)
  • ESD protection: HBM JESD22-A114F exceeds 2000V, MM JESD22-A115-A exceeds 200V
  • ±24mA output drive (VCC = 3.0V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250mA
  • Direct TTL-level interfacing
  • Inputs accept voltages up to 5V
  • Multiple package options
  • Specified operating temperature range: -40°C to +85°C and -40°C to +125°C