HANSCHIP semiconductor TJA1040DRG

The TJA1040 is an interface between a CAN protocol controller and the physical bus. It is primarily designed for high-speed automotive applications, supporting data rates up to 1 Mbaud. The TJA1040 provides differential transmit capability to the bus and differential receive capability to the CAN controller.

In terms of pinout and functionality, the TJA1040 is pin-compatible with the TJA1050. The TJA1040 features excellent EMC performance, ideal passive behavior in unpowered conditions, low-power management, and remote wake-up capability.

The TJA1040 has two operating modes, selectable via the STB pin. Normal Mode: In this mode, the transceiver can transmit and receive data over the CANH and CANL bus lines. The differential receiver converts analog signals on the bus into digital data, which is output to RXD through the MUX. The output signal slope on the bus lines is fixed and optimized to ensure very low EME. Standby Mode: In this mode, both the transmitter and receiver are disabled; only a low-power differential receiver monitors the bus. The bus lines are shorted to ground to minimize the supply current Icc. A diode is connected in series with the high-side driver on RXD to prevent reverse current from flowing from RXD to Vcc in unpowered conditions. In normal mode, this diode is bypassed, but it remains unbypassed in standby mode to reduce current consumption.

The split circuit is a 0.5 Vcc DC voltage stabilizer. It is active only in normal mode. In standby mode, the SPLIT pin is left floating. The split circuit can stabilize the recessive common-mode voltage by connecting the SPLIT pin to the center tap of a split termination.

Overtemperature Protection: Thermal protection is provided. If the junction temperature exceeds 165°C, the output driver is disabled. The TXD will return to recessive state only after the junction temperature falls below the typical threshold of 165°C.

TXD Dominant Timeout: If the TXD pin is held low continuously due to a hardware or software fault, the TXD dominant timeout timer circuit prevents the bus from being locked in a permanent dominant state, which would block all network communication.

Automatic Fail-Safe: The TXD pin has a pull-up to Vcc to keep it at the recessive level when not driven. The STB pin has a pull-up to Vcc to place the transceiver in standby mode when not driven. If Vcc is lost, the TXD, STB, and RXD pins float to prevent reverse current through these pins.

• Fully compliant with ISO 11898 standard
• High speed (up to 1 Mbaud)
• Very low electromagnetic emission (EME)
• Differential receiver with wide common-mode range for EMI immunity
• Unpowered transceiver disconnects from bus (zero load)
• Input stage compatible with 3.3V to 5V devices
• Split termination allows voltage source to stabilize recessive bus level (further improved EME)
• Supports connection of at least 110 nodes
• Very low current consumption standby mode with remote wake-up via bus
• TXD dominant timeout function
• Bus pin protection in automotive transient environments
• Short-circuit protection on bus pins and SPLIT pin to supply and ground with thermal protection

• Automotive Electronics