MaxLinear XRT83VSH28IB-F

The XRT83VSH28 is a fully integrated 8-channel short-haul line interface unit (LIU) that operates from a 1.8V and a 3.3V power supply. Using internal termination, the LIU provides one bill of materials to operate in E1 75Ω or 120Ω mode with minimum external components. The LIU features are programmed through a standard parallel or serial microprocessor interface. It has patented high impedance circuits that allow the transmitter outputs and receiver inputs to be high impedance when experiencing a power failure or when the LIU is powered off. Key design features within the LIU optimize 1:1 or 1+1 redundancy and non-intrusive monitoring applications to ensure reliability without using relays. The on-chip clock synthesizer generates an E1 clock reference. Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/detection, TAOS, DMO, and diagnostic loopback modes.

• Fully integrated eight channel short-haul transceivers for E1 (2.048MHz) application
• Internal Impedance matching on both receive and transmit for 75 (E1) and 120 (E1) applications are port selectable through software without changing components
• Power down on a per channel basis with independent receive and transmit selection
• User programable Arbitrary Pulse mode
• On-Chip transmit short-circuit protection and limiting protects line drivers from damage on a per channel basis
• Selectable Crystal-Less digital jitter attenuators (JA) with 32-Bit or 64-Bit FIFO for the receive or transmit path
• Driver failure monitor output (DMO) alerts of possible system or external component problems
• Transmit outputs and receive inputs may be "High" impedance for protection or redundancy applications on per channel basis
• Support for automatic protection switching
• 1:1 and 1+1 protection without relays
• Receive monitor mode handles 0 to 6dB resistive attenuation (flat loss) along with 0 to 6dB cable loss
• Loss of signal (RLOS) according to ITU-T G.775/ETS300233 (E1)
• Programmable data stream muting upon RLOS detection
• On-Chip HDB3 encoder/decoder with an internal 16-bit LCV counter for each channel
• On-Chip digital clock recovery circuit for high input jitter tolerance
• QRSS/PRBS pattern generator and detection for testing and monitoring
• Error and bipolar violation insertion and detection
• Transmit all ones (TAOS) Generators and Detectors
• Supports local analog, remote, digital, and dual loopback modes
• Supports gapped clocks for mapper/multiplexer applications
• 1.8V Inner Core
• 3.3V I/O Supply Operation
• 225 ball BGA package
• -40°C to +85°C Temperature Range

• ISDN Primary Rate Interface
• CSU/DSU E1 Interface
• E1 LAN/WAN Routers
• Public switching Systems and PBX Interfaces
• E1 Multiplexer and Channel Banks