TI TLK10031CTR

The TLK10031 is a single-channel, multi-rate transceiver for high-speed bidirectional point-to-point data transmission systems. The device supports three primary modes. It can be used as an XAUI to 10GBASE-KR transceiver, a general-purpose 8b/10b multi-rate 4:1, 2:1, 1:1 serializer/deserializer, or in 1G-KX mode.

Operating in 10GBASE-KR mode, the TLK10031 serializes the 8B/10B-encoded XAUI data stream present at its low-speed (LS) data input. The serialized 8B/10B-encoded data appears at the high-speed (HS) output in 64B/66B encoded format. Similarly, the TLK10031 deserializes the 64B/66B-encoded data stream present at its high-speed data input. The deserialized 64B/66B data appears at the low-speed output in XAUI 8B/10B format. Link training and forward error correction (FEC) for extended-reach applications are supported in this mode.

Operating in general-purpose SERDES mode, the TLK10031 performs 2:1 and 4:1 serialization of the 8B/10B-encoded data stream present at its low-speed (LS) data input. The serialized 8B/10B-encoded data appears at the high-speed (HS) output. Similarly, the TLK10031 performs 1:2 and 1:4 deserialization of the 8B/10B-encoded data stream present at its high-speed data input. The deserialized 8B/10B-encoded data appears at the low-speed output. Depending on the serialization/deserialization ratio, the low-speed data rate ranges from 0.5 Gbps to 5 Gbps, while the high-speed data rate ranges from 1 Gbps to 10 Gbps. A 1:1 retiming mode is also supported, with the rate limited to 1 Gbps to 5 Gbps.

The TLK10031 also supports 1G-KX (1.25 Gbps) mode with PCS (CTC) functionality. This mode can be enabled through software provisioning or auto-negotiation. When software provisioning is used, supported data rates can reach up to 3.125 Gbps.

The TLK10031 incorporates a built-in crosspoint switch that enables redundant outputs and simplified data rerouting. Each output port (high-speed or low-speed) can be configured to output data from any device input port. This switching can be initiated via a hardware pin or software control, and can be configured for immediate switching or to occur at the end of the current packet. This enables switching between data sources without corrupting packets.

The low-speed and high-speed data inputs and outputs are differential current mode logic (CML) type with integrated termination resistors.

The TLK10031 provides flexible clocking mechanisms to support various operations. These mechanisms include support for clocking using an external jitter-attenuating clock recovered from the high-speed input. The device is also capable of performing clock tolerance compensation (CTC) in 10GBASE-KR and 1GBASE-KX modes to enable asynchronous clocking.

The TLK10031 provides low-speed and high-speed loopback modes for built-in self-test and system diagnostic purposes.

The TLK10031 features built-in pattern generators and verifiers to facilitate system testing. The device supports generation and verification of various PRBS, high/low/mixed-frequency, CRPAT long/short, CJPAT, and KR pseudo-random test patterns, as well as square wave generation. The pattern types supported on the low-speed and high-speed sides depend on the selected operating mode.

The TLK10031 incorporates an integrated loss-of-signal (LOS) detection function on both the high-speed and low-speed sides. LOS is asserted when the input differential voltage swing falls below the LOS assertion threshold.

The low-speed side of the TLK10031 is well suited for interfacing with FPGAs, ASICs, media access controllers (MACs), or network processors capable of handling lower-rate serial data streams. The high-speed side is well suited for interfacing with remote systems via fiber, cable, or backplane interfaces. The device supports SFP and SFP+ optical modules as well as 10GBASE-KR-compatible backplane systems.

• Single-channel multi-rate transceiver
• Supports 10GBASE-KR, XAUI, and 1GBASE-KX Ethernet standards
• Supports all data rates up to 10Gbps
• CPRI and OBSAI
• Multi-rate SERDES operation supporting data rates up to 10.3125Gbps on the high-speed side and up to 5Gbps on the low-speed side
• Differential CML I/O interface on both high-speed and low-speed sides
• Interface to backplane, passive and active copper cables, or SFP+ optical modules
• Optional reference clock with multiple output clock options
• Supports PRBS, CRPAT, CJPAT, high/low/mixed pattern, KR pseudo-random pattern generation and verification, and square wave generation
• Supports data retiming operation
• Dual supply: 1V (core) and 1.5V/1.8V (I/O)
• No power sequencing required
• Transmit de-emphasis and receive adaptive equalization for extended backplane/cable reach
• LOS detection on both high-speed and low-speed sides
• Supports 10G-KR link negotiation, FEC, and auto-negotiation
• Jumbo frame support
• JTAG; IEEE 1149.1 test interface
• Industry-standard MDIO control interface
• 65nm advanced CMOS technology
• Industrial operating temperature range (−40°C to 85°C)
• Power consumption: 800mW (typical)

• 10GBASE-KR compatible backplane connections
• 10 Gigabit Ethernet switches, routers, and network interface cards
• Proprietary cable/backplane high-speed point-to-point transmission systems