TI TLC1551IFN
| Manufacturer | |
| MPN | TLC1551IFN |
| LCSC Part # | C1543422 |
| Packaging | PLCC-28(11.5x11.5) |
| Customer # | |
| Key Attributes | Parallel port 4.75V~5.5V PLCC-28(11.5x11.5) Analog to Digital Converters (ADC) RoHS |
| Datasheet |  TI TLC1551IFN |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | PLCC-28(11.5x11.5) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | - | |
| Voltage - Supply | 4.75V~5.5V | |
| Number of Channels | 1 | |
| Integral non - linearity | 1LSB | |
| Voltage Reference | External | |
| Clock/Oscillator | Internal or external | |
| Clock Frequency | 500kHz~7.8MHz | |
| Features | - | |
| Resolution(Bits) | -;10 | |
| S/N Ratio | - | |
| ADC architecture | SAR | |
| Programmable Gain | Not supported |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | PLCC-28(11.5x11.5) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | - | |
| Voltage - Supply | 4.75V~5.5V | |
| Number of Channels | 1 | |
| Integral non - linearity | 1LSB |
| Type | Description | |
|---|---|---|
| Voltage Reference | External | |
| Clock/Oscillator | Internal or external | |
| Clock Frequency | 500kHz~7.8MHz | |
| Features | - | |
| Resolution(Bits) | -;10 | |
| S/N Ratio | - | |
| ADC architecture | SAR | |
| Programmable Gain | Not supported |
Introduction
The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.
Features
- Advanced LinEPIC Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
- Fast Parallel Processing for DSP and µP Interface
- Either External or Internal Clock Can Be Used
- Conversion Time ... 6 µs
- Total Unadjusted Error ... ±1 LSB Max
- CMOS Technology
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 5.6392 | $ 5.64 |
| 200+ | $ 2.1831 | $ 436.62 |
| 500+ | $ 2.1063 | $ 1053.15 |
| 1,000+ | $ 2.0678 | $ 2067.80 |
Standard Packaging37/Full Tube | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | PLCC-28(11.5x11.5) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | - | |
| Voltage - Supply | 4.75V~5.5V | |
| Number of Channels | 1 | |
| Integral non - linearity | 1LSB | |
| Voltage Reference | External | |
| Clock/Oscillator | Internal or external | |
| Clock Frequency | 500kHz~7.8MHz | |
| Features | - | |
| Resolution(Bits) | -;10 | |
| S/N Ratio | - | |
| ADC architecture | SAR | |
| Programmable Gain | Not supported |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | PLCC-28(11.5x11.5) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | - | |
| Voltage - Supply | 4.75V~5.5V | |
| Number of Channels | 1 | |
| Integral non - linearity | 1LSB |
| Type | Description | |
|---|---|---|
| Voltage Reference | External | |
| Clock/Oscillator | Internal or external | |
| Clock Frequency | 500kHz~7.8MHz | |
| Features | - | |
| Resolution(Bits) | -;10 | |
| S/N Ratio | - | |
| ADC architecture | SAR | |
| Programmable Gain | Not supported |
Introduction
The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.
Features
- Advanced LinEPIC Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
- Fast Parallel Processing for DSP and µP Interface
- Either External or Internal Clock Can Be Used
- Conversion Time ... 6 µs
- Total Unadjusted Error ... ±1 LSB Max
- CMOS Technology
C1543422 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |