Hangzhou Ruimeng Tech MS90C104

The MS90C104 chip converts 5-channel LVDS signals into 35-bit TTL data. The clock channel is phase-locked and output in parallel with the data channels. At a clock frequency of 175MHz, 30-bit RGB data, 3-bit LCD timing data, and 2-bit control data are transmitted at 1225Mbps per LVDS data channel. At an input clock frequency of 175MHz, the data transfer rate is 765.6Mbytes/sec. This chip is an ideal solution for addressing EMI and cable length issues at the high-bandwidth, high-speed TTL signal level.

• Frequency range: 8 - 175MHz clock signal
• Reduced bus minimizes wiring size and cost
• 3.3V supply low-power mode
• Supports VGA, SVGA, XGA, SXGA
• 6.125Gbps data throughput
• 765.6Megabytes/sec bandwidth
• Reduced LVDS swing for lower EMI (300mV LVDS swing)
• PLL requires no external components
• Compliant with TIA/EIA-644 LVDS standard
• TQFP64 package