ADI LTC2266CUJ-12#TRPBF
| Manufacturer | |
| MPN | LTC2266CUJ-12#TRPBF |
| LCSC Part # | C679783 |
| Packaging | QFN-40-EP(6x6) |
| Customer # | |
| Key Attributes | QFN-40-EP(6x6) Analog to Digital Converters (ADC) RoHS |
| Datasheet |  ADI LTC2266CUJ-12#TRPBF |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) | |
| Features | Programmable gain;Built-in reference source;Differential output;Power-down mode | |
| DNL (LSB) | 0.1LSB | |
| ADC architecture | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) |
| Type | Description | |
|---|---|---|
| Features | Programmable gain;Built-in reference source;Differential output;Power-down mode | |
| DNL (LSB) | 0.1LSB | |
| ADC architecture | - |
Introduction
The LTC2268-12/LTC2267-12/LTC2266-12 are 2-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC- inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
Features
- 2-Channel Simultaneous Sampling ADC
- 70.6dB SNR
- 88dB SFDR
- Low Power: 292mW/238mW/200mW Total, 146mW/119mW/100mW per Channel
- Single 1.8V Supply
- Serial LVDS Outputs: 1 or 2 Bits per Channel Selectable
- Input Ranges: 1VP-P to 2VP-P
- 800MHz Full Power Bandwidth
- S/H Shutdown and Nap Modes
- Serial SPI Port for Configuration
- Pin Compatible 14-Bit and 12-Bit Versions
- 40-Pin (6mmx6mm) QFN Package
Applications
- Communications
- Cellular Base Stations
- Software Defined Radios
- Portable Medical Imaging
- Multichannel Data Acquisition
- Nondestructive Testing
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 45.4182 | $ 45.42 |
| 200+ | $ 17.5771 | $ 3515.42 |
| 500+ | $ 16.9597 | $ 8479.85 |
| 1,000+ | $ 16.6541 | $ 16654.10 |
Standard Packaging2000/Full Reel | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) | |
| Features | Programmable gain;Built-in reference source;Differential output;Power-down mode | |
| DNL (LSB) | 0.1LSB | |
| ADC architecture | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) |
| Type | Description | |
|---|---|---|
| Features | Programmable gain;Built-in reference source;Differential output;Power-down mode | |
| DNL (LSB) | 0.1LSB | |
| ADC architecture | - |
Introduction
The LTC2268-12/LTC2267-12/LTC2266-12 are 2-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC- inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
Features
- 2-Channel Simultaneous Sampling ADC
- 70.6dB SNR
- 88dB SFDR
- Low Power: 292mW/238mW/200mW Total, 146mW/119mW/100mW per Channel
- Single 1.8V Supply
- Serial LVDS Outputs: 1 or 2 Bits per Channel Selectable
- Input Ranges: 1VP-P to 2VP-P
- 800MHz Full Power Bandwidth
- S/H Shutdown and Nap Modes
- Serial SPI Port for Configuration
- Pin Compatible 14-Bit and 12-Bit Versions
- 40-Pin (6mmx6mm) QFN Package
Applications
- Communications
- Cellular Base Stations
- Software Defined Radios
- Portable Medical Imaging
- Multichannel Data Acquisition
- Nondestructive Testing
C679783 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |