MICROCHIP SST39VF401C-70-4C-B3KE-T

The SST39VF401C/402C and SST39LF401C/402C devices are 256K x16 CMOS Multi-Purpose Flash Plus (MPF+) manufactured with proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. SST39LF401C/402C write (Program or Erase) with a 3.0 - 3.6V power supply. SST39VF401C/402C write with a 2.7 - 3.6V power supply. These devices conform to JEDEC standard pinouts for x16 memories. Featuring high performance Word-Program, the SST39VF401C/402C and SST39LF401C/402C devices provide a typical Word-Program time of 7 µsec. These devices use Toggle Bit, Data# Polling, or the RY/BY# pin to indicate the completion of Program operation. To protect against inadvertent write, they have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical endurance of 100,000 cycles. Data retention is rated at greater than 100 years. The SST39VF401C/402C and SST39LF401C/402C devices are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, they significantly improve performance and reliability, while lowering power consumption. They inherently use less energy during Erase and Program than alternative flash technologies. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. These devices also improve flexibility while lowering the cost for program, data, and configuration storage applications. The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/Program cycles that have occurred. Therefore the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Program times increase with accumulated Erase/Program cycles.

• Organized as 256K x16
• Single Voltage Read and Write Operations – 2.7 - 3.6V for SST39VF401C/402C – 3.0 - 3.6V for SST39LF401C/402C
• Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention
• Low Power Consumption (typical values at 5 MHz) – Active Current: 5 mA (typical) – Standby Current: 3 µA (typical) – Auto Low Power Mode: 3 µA (typical)
• Hardware Block-Protection/WP# Input Pin – Top Block-Protection (top 8 KWord) – Bottom Block-Protection (bottom 8 KWord)
• Sector-Erase Capability – Uniform 2 KWord sectors
• Block-Erase Capability – Flexible block architecture; one 8-, two 4-, one 16-, and seven 32-KWord blocks
• Chip-Erase Capability
• Erase-Suspend/Erase-Resume Capabilities
• Hardware Reset Pin (RST#)
• Latched Address and Data
• Security-ID Feature – 128 bits; User: 128 words
• Fast Read Access Time: – 70 ns for SST39VF401C/402C – 55 ns for SST39LF401C/402C
• Fast Erase and Word-Program: – Sector-Erase Time: 18 ms (typical) – Block-Erase Time: 18 ms (typical) – Chip-Erase Time: 40 ms (typical) – Word-Program Time: 7 µs (typical)
• Automatic Write Timing – Internal VPP Generation
• End-of-Write Detection – Toggle Bits – Data# Polling – Ready/Busy# Pin
• CMOS I/O Compatibility
• JEDEC Standard – Flash EEPROM Pinouts and command sets
• Packages Available – 48-lead TSOP (12mm x 20mm) – 48-ball TFBGA (6mm x 8mm) – 48-ball WFBGA (4mm x 6mm)
• All devices are RoHS compliant