RENESAS 9DBV0231AKLF
| Manufacturer | |
| MPN | 9DBV0231AKLF |
| LCSC Part # | C150296 |
| Packaging | QFN-24(4x4) |
| Customer # | |
| Key Attributes | 1.7V~1.9V 200MHz 2 QFN-24(4x4) Application Specific Clock/Timing RoHS |
| Datasheet |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | QFN-24(4x4) | |
| Voltage - Supply | 1.7V~1.9V | |
| Features | Spread spectrum;Output enable/shutdown;Built-in phase-locked loop | |
| Operating Temperature | - | |
| Output Frequency(Max) | 200MHz | |
| Number of outputs | 2 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | QFN-24(4x4) | |
| Voltage - Supply | 1.7V~1.9V |
| Type | Description | |
|---|---|---|
| Features | Spread spectrum;Output enable/shutdown;Built-in phase-locked loop | |
| Operating Temperature | - | |
| Output Frequency(Max) | 200MHz | |
| Number of outputs | 2 |
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Introduction
AI Translation
The 9DBV0231 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 2 output enables for clock management.
Features
AI Translation
- LP-HCSL outputs; save 4 resistors compared to standard HCSL outputs
- 35mW typical power consumption in PLL mode; reduced thermal concerns
- Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
- OE# pins; support DIF power management
- HCSL compatible differential input; can be driven by common clock sources
- SMBus-selectable features; optimize signal integrity to application
- slew rate for each output
- differential output amplitude
- Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Outputs blocked until PLL is locked; clean system start-up
- Device contains default configuration; SMBus interface not required for device control
- 3.3V tolerant SMBus interface works with legacy controllers
- Space saving 24-pin 4x4mm VFQFPN; minimal board space
Applications
AI Translation
- 1.8V PCIe Gen1/2/3 Zero-Delay/Fan-out Buffer (ZDB/FOB)
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 1.6188 | $ 1.62 |
| 10+ | $ 1.349 | $ 13.49 |
| 30+ | $ 1.201 | $ 36.03 |
| 100+ | $ 1.033 | $ 103.30 |
| 500+ | $ 0.959 | $ 479.50 |
| 1,000+ | $ 0.9251 | $ 925.10 |
Standard Packaging75/Full Tube | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | QFN-24(4x4) | |
| Voltage - Supply | 1.7V~1.9V | |
| Features | Spread spectrum;Output enable/shutdown;Built-in phase-locked loop | |
| Operating Temperature | - | |
| Output Frequency(Max) | 200MHz | |
| Number of outputs | 2 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing | |
| Manufacturer | RENESAS | |
| Packaging | QFN-24(4x4) | |
| Voltage - Supply | 1.7V~1.9V |
| Type | Description | |
|---|---|---|
| Features | Spread spectrum;Output enable/shutdown;Built-in phase-locked loop | |
| Operating Temperature | - | |
| Output Frequency(Max) | 200MHz | |
| Number of outputs | 2 |
Report an ErrorShow similar products (0) >
Introduction
AI Translation
The 9DBV0231 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 2 output enables for clock management.
Features
AI Translation
- LP-HCSL outputs; save 4 resistors compared to standard HCSL outputs
- 35mW typical power consumption in PLL mode; reduced thermal concerns
- Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
- OE# pins; support DIF power management
- HCSL compatible differential input; can be driven by common clock sources
- SMBus-selectable features; optimize signal integrity to application
- slew rate for each output
- differential output amplitude
- Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
- Outputs blocked until PLL is locked; clean system start-up
- Device contains default configuration; SMBus interface not required for device control
- 3.3V tolerant SMBus interface works with legacy controllers
- Space saving 24-pin 4x4mm VFQFPN; minimal board space
Applications
AI Translation
- 1.8V PCIe Gen1/2/3 Zero-Delay/Fan-out Buffer (ZDB/FOB)
C150296 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

