ADI ADSP-SC572BBCZ-4
| Produttore | |
| Cod. Prod. | ADSP-SC572BBCZ-4 |
| Cod. LCSC | C659985 |
| Imballo | BGA-400 |
| Numero Cliente | |
| Attr. chiave | BGA-400 DSP (Digital Signal Processors) RoHS |
| Scheda Tecnica |  ADI ADSP-SC572BBCZ-4 |
| Conformità RoHS | 1 documenti disponibili |
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Produttore | ADI | |
| Imballo | BGA-400 | |
| Features | Multi-core cooperative processing;Parallel data channel;Circular buffer support;Zero-overhead loop;DMA data transfer;High-speed peripheral interface;Integrated ADC interface;Interrupt response;Secure storage and protection |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Produttore | ADI |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | BGA-400 | |
| Features | Multi-core cooperative processing;Parallel data channel;Circular buffer support;Zero-overhead loop;DMA data transfer;High-speed peripheral interface;Integrated ADC interface;Interrupt response;Secure storage and protection |
Descrizione
The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.
By integrating a set of industry leading system peripherals and memory, the ARM CortexA5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
Caratteristiche
- Dual-enhanced SHARC+ high performance floating-point cores
- Up to 500 MHz per SHARC+ core
- Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache)
- 32-bit, 40-bit, and 64-bit floating-point support
- 32-bit fixed point
- Byte, short word, word, long word addressed
- ARM Cortex-A5 core 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle
- 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity
- 256 kB L2 cache with parity
- Powerful DMA system
- On-chip memory protection
- Integrated safety features
- 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
- Low system power across automotive temperature range
- Large on-chip L2 SRAM with ECC protection, up to 1 MB
- One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices
- Security and Protection Cryptographic hardware accelerators
- Fast secure boot with IP protection
- Support for ARM TrustZone
- Accelerators FIR, IIR offload engines
- Qualified for automotive applications
Applicazioni
- automotive
- professional audio
- industrial-based applications
| Qtà | Pr. unit.(Solo per riferimento) | Importo totale |
|---|---|---|
| 1+ | $ 34.4488 | $ 34.45 |
| 200+ | $ 13.331 | $ 2666.20 |
| 500+ | $ 12.8633 | $ 6431.65 |
| 1,000+ | $ 12.6318 | $ 12631.80 |
Package Standard90/Full Tray | ||
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Produttore | ADI | |
| Imballo | BGA-400 | |
| Features | Multi-core cooperative processing;Parallel data channel;Circular buffer support;Zero-overhead loop;DMA data transfer;High-speed peripheral interface;Integrated ADC interface;Interrupt response;Secure storage and protection |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Produttore | ADI |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | BGA-400 | |
| Features | Multi-core cooperative processing;Parallel data channel;Circular buffer support;Zero-overhead loop;DMA data transfer;High-speed peripheral interface;Integrated ADC interface;Interrupt response;Secure storage and protection |
Descrizione
The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.
By integrating a set of industry leading system peripherals and memory, the ARM CortexA5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
Caratteristiche
- Dual-enhanced SHARC+ high performance floating-point cores
- Up to 500 MHz per SHARC+ core
- Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache)
- 32-bit, 40-bit, and 64-bit floating-point support
- 32-bit fixed point
- Byte, short word, word, long word addressed
- ARM Cortex-A5 core 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle
- 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity
- 256 kB L2 cache with parity
- Powerful DMA system
- On-chip memory protection
- Integrated safety features
- 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
- Low system power across automotive temperature range
- Large on-chip L2 SRAM with ECC protection, up to 1 MB
- One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices
- Security and Protection Cryptographic hardware accelerators
- Fast secure boot with IP protection
- Support for ARM TrustZone
- Accelerators FIR, IIR offload engines
- Qualified for automotive applications
Applicazioni
- automotive
- professional audio
- industrial-based applications
C659985 Libreria EasyEDA
Conformità & Codici di Esportazione
| Tipo | Dettagli |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Tipo | Dettagli |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Tipo | Dettagli |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |