ADI AD9522-2BCPZ-REEL7

The AD9522-21 provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.02 GHz to 2.335 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used. The AD9522 serial interface supports both SPI and I²C ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset. The AD9522 features 12 LVDS outputs in four groups. Any of the 800 MHz LVDS outputs can be reconfigured as two 250 MHz CMOS outputs. Each group of outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase (coarse delay) to be set. The AD9522 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage up to 5.5 V. The AD9522 is specified for operation over the standard industrial range of -40°C to +85°C. The AD9520-2 is an equivalent part to the AD9522-2 featuring LVPECL/CMOS drivers instead of LVDS/CMOS drivers.

• Low phase noise, phase-locked loop (PLL)
• On-chip voltage controlled oscillator (VCO) tunes from 2.02 GHz to 2.335 GHz
• Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz
• 1 differential or 2 single-ended reference inputs
• Accepts CMOS, LVPECL, or LVDS references to 250 MHz
• Accepts 16.62 MHz to 33.3 MHz crystal for reference input
• Optional reference clock doubler
• Reference monitoring capability
• Revertive automatic and manual reference switchover/ holdover modes
• Glitch-free switchover between references
• Automatic recovery from holdover
• Digital or analog lock detect, selectable
• Optional zero delay operation
• Twelve 800 MHz LVDS outputs divided into 4 groups
• Each group of 3 has a 1-to-32 divider with phase delay
• Additive output jitter as low as 242 fs rms
• Channel-to-channel skew grouped outputs <60 ps
• Each LVDS output can be configured as 2 CMOS outputs (for fOUT ≤ 250 MHz)
• Automatic synchronization of all outputs on power-up
• Manual synchronization of outputs as needed
• SPI- and I²C-compatible serial control port
• 64-lead LFCSP
• Nonvolatile EEPROM stores configuration settings

• Low jitter, low phase noise clock distribution
• Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols
• Forward error correction (G.710)
• Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
• High performance wireless transceivers
• ATE and high performance instrumentation
• Broadband infrastructures