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MICROCHIP ZL30274LDG1 product image
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MICROCHIP ZL30274LDG1

Manufacturer
MPN
ZL30274LDG1
LCSC Part #
C3607154
Packaging
VQFN-64(9x9)
Customer #
Key Attributes
VQFN-64(9x9) Clock Generators, PLLs, Frequency Synthesizers RoHS
Datasheetpdf iconMICROCHIP ZL30274LDG1
RoHS Compliance1 documents available
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QtyUnit Price(Reference Only)Total Amount
1+$ 25.9915$ 25.99
260+$ 10.0588$ 2615.29
520+$ 9.7056$ 5046.91
1,040+$ 9.5297$ 9910.89
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Products Specifications

All

Features

AI Translation
  • Single-channel (ZL30272, ZL30273) or dual-channel (ZL30274) independent clock channels
  • Any-frequency-to-any-frequency conversion per channel
  • Inputs: up to 8, differential or single-ended
  • Outputs: up to 10 differential, up to 20 CMOS (ZL30272: up to 6 differential, up to 12 CMOS)
  • Typical output jitter: 100 fsRMS for 156.25 MHz signal, 12 kHz to 20 MHz integration band
  • Core power consumption < 0.9W
  • Accepts up to 6 (ZL30272, ZL30273) or 8 (ZL30274) differential or CMOS inputs
  • Input frequency range: 1 kHz to 1250 MHz
  • Activity and frequency monitoring on each input
  • Automatic or manual reference clock switching
  • Revertive or non-revertive switching
  • Any input configurable as 0.5 Hz to 8 kHz sync input for reference-sync frequency/phase/time locking
  • Input phase measurement with 1 ps resolution
  • Per-input phase adjustment with 1 ps resolution
  • One (ZL30272/273) or two (ZL30274) digital PLLs
  • Hitless reference switching
  • Per-DPLL phase adjustment with 1 ps resolution
  • Programmable bandwidth, tracking range, phase slope limiting, and other advanced features
  • Lockable to input signals with clock gaps
  • Output frequency range: 0.5 Hz to 750 MHz
  • Each OUTP/N pair configurable as LVDS, LVPECL, 2xCMOS, low common-mode voltage, or programmable differential output
  • In 2xCMOS mode, P and N pins can output different frequencies (e.g., 125 MHz and 25 MHz)
  • Independent supply voltage per output pair, CMOS voltage range 1.8V to 3.3V
  • Per-synthesizer phase adjustment with 1 ps resolution
  • Per-output duty cycle adjustment
  • Precise output alignment circuitry with per-output phase adjustment
  • Per-output independent enable/disable with glitchless start/stop (stoppable at high or low level)
  • Operates from a single oscillator at 9.72 MHz to 400 MHz
  • Auto-configuration from internal flash at power-up, supporting 7 configurations
  • Input-to-output alignment time < 100 ps
  • DCO behavior in each DPLL and each synthesizer
  • Easy configuration — no external VCXOs or loop filter components required
  • 5 GPIO pins with multiple behavior modes; each reference clock pin usable as general-purpose input, each output usable as general-purpose output
  • SPI or I²C processor interface
  • 1.8V and 3.3V core supply voltages
  • 48-pin 7mm×7mm VQFN package (ZL30272)
  • 64-pin 9mm×9mm VQFN package (ZL30273, ZL30274)
  • Easy-to-use evaluation/programming software

Applications

AI Translation
  • Communication equipment
  • Test & measurement instruments
  • Data center equipment
  • Industrial automation systems
  • Consumer electronics