Infineon/CYPRESS CY7C1472BV33-200BZXC

The CY7C1470BV33, CY7C1472BV33, and CY7C1474BV33 are 3.3 V, 2Mx36/4Mx18/1Mx72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back read or write operations with no wait states. The CY7C1470BV33, CY7C1472BV33, and CY7C1474BV33 are equipped with the advanced (NoBL) logic required to enable consecutive read or write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent read or write transitions. The CY7C1470BV33, CY7C1472BV33, and CY7C1474BV33 are pin compatible and functionally equivalent to ZBT devices.

• Pin-compatible and functionally equivalent to ZBT
• Supports 250 MHz bus operations with zero wait states
• Available speed grades are 250, 200, and 167 MHz
• Internally self timed output buffer control to eliminate the need to use asynchronous OE
• Fully registered (inputs and outputs) for pipelined operation
• Byte Write capability
• Single 3.3 V power supply
• Fast clock-to-output time 3.0 ns (for 250 MHz device)
• Clock Enable (CEN) pin to suspend operation
• Synchronous self timed writes
• IEEE 1149.1 JTAG Boundary Scan compatible
• Burst capability – linear or interleaved burst order
• “ZZ” Sleep Mode option and Stop Clock option