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NXP MM912G634DV2APR2
| Manufacturer | |
| MPN | MM912G634DV2APR2 |
| LCSC Part # | C2679367 |
| Packaging | LQFP-48(7x7) |
| Customer # | |
| Key Attributes | Others LQFP-48(7x7) Application Specific Microcontrollers RoHS |
| Datasheet |  NXP MM912G634DV2APR2 |
| RoHS Compliance | 2 documents available |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Application Specific Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-48(7x7) | |
| Voltage - Supply | 2.25V~5.5V | |
| Operating Temperature | -40℃~+105℃ | |
| Program Storage Size | 48KB | |
| CPU Core | Others |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Application Specific Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-48(7x7) | |
| Voltage - Supply | 2.25V~5.5V |
| Type | Description | |
|---|---|---|
| Operating Temperature | -40℃~+105℃ | |
| Program Storage Size | 48KB | |
| CPU Core | Others |
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Introduction
AI Translation
The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated, single package solutions which integrate an HCS12 microcontroller with a SMARTMOS analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application specific functions, including a LIN transceiver.
Features
AI Translation
- 16-Bit S12 CPU, 64/48 kByte P-FLASH, 6.0 kByte RAM; 4/2 kByte D-FLASH
- Background debug (BDM) & debug module (DBG)
- Die to Die bus interface for transparent memory mapping
- On-chip oscillator & two independent watchdogs
- LIN 2.1 Physical layer interface with integrated SCI
- 10 digital MCU GPIOs shared with SPI (PA7…0, PE1…0)
- 10-Bit, 15 Channel - Analog to Digital converter (ADC)
- 16-Bit, 4 Channel - Timer module (TIM16B4C)
- 8-Bit, 2 Channel - Pulse width modulation module (PWM)
- Six high-voltage / Wake-up inputs (L5…0)
- Three low voltage GPIOs (PB2…0)
- Low power modes with cyclic sense & forced wake-up
- Current sense module with selectable gain
- Reverse battery protected voltage sense module
- Two protected low-side outputs to drive inductive loads
- Two protected high-side outputs
- Chip temperature sensor
- Hall sensor supply & integrated voltage regulator(s)
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 15.0826 | $ 15.08 |
| 200+ | $ 5.8371 | $ 1167.42 |
| 500+ | $ 5.6319 | $ 2815.95 |
| 1,000+ | $ 5.5316 | $ 5531.60 |
Standard Packaging2000/Full Reel | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Application Specific Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-48(7x7) | |
| Voltage - Supply | 2.25V~5.5V | |
| Operating Temperature | -40℃~+105℃ | |
| Program Storage Size | 48KB | |
| CPU Core | Others |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Application Specific Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-48(7x7) | |
| Voltage - Supply | 2.25V~5.5V |
| Type | Description | |
|---|---|---|
| Operating Temperature | -40℃~+105℃ | |
| Program Storage Size | 48KB | |
| CPU Core | Others |
Report an ErrorShow similar products (0) >
Introduction
AI Translation
The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated, single package solutions which integrate an HCS12 microcontroller with a SMARTMOS analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application specific functions, including a LIN transceiver.
Features
AI Translation
- 16-Bit S12 CPU, 64/48 kByte P-FLASH, 6.0 kByte RAM; 4/2 kByte D-FLASH
- Background debug (BDM) & debug module (DBG)
- Die to Die bus interface for transparent memory mapping
- On-chip oscillator & two independent watchdogs
- LIN 2.1 Physical layer interface with integrated SCI
- 10 digital MCU GPIOs shared with SPI (PA7…0, PE1…0)
- 10-Bit, 15 Channel - Analog to Digital converter (ADC)
- 16-Bit, 4 Channel - Timer module (TIM16B4C)
- 8-Bit, 2 Channel - Pulse width modulation module (PWM)
- Six high-voltage / Wake-up inputs (L5…0)
- Three low voltage GPIOs (PB2…0)
- Low power modes with cyclic sense & forced wake-up
- Current sense module with selectable gain
- Reverse battery protected voltage sense module
- Two protected low-side outputs to drive inductive loads
- Two protected high-side outputs
- Chip temperature sensor
- Hall sensor supply & integrated voltage regulator(s)
C2679367 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |